H8SLASH3028F datasheet(493/923 Pages) RENESAS

493 / 923 page

Rev. 2.00, 09/03, page 463 of 890

Bits 1 and 0—Clock Enable 1 and 0 (CKE1/0): The function of these bits differs for the normal

serial communication interface and for the smart card interface. Their function is switched with

the SMIF bit in SCMR.

For serial communication interface (SMIF bit in SCMR cleared to 0): These bits select the

SCI clock source and enable or disable clock output from the SCK pin. Depending on the settings

of CKE1 and CKE0, the SCK pin can be used for generic input/output, serial clock output, or

serial clock input.

The CKE0 setting is valid only in asynchronous mode, and only when the SCI is internally

clocked (CKE1 = 0). The CKE0 setting is ignored in synchronous mode, or when an external

clock source is selected (CKE1 = 1). Select the SCI operating mode in SMR before setting the

CKE1 and CKE0 bits . For further details on selection of the SCI clock source, see table 13.9 in

section 13.3, Operation.

Bit 1

CKE1

Bit 0

CKE0

Description

Asynchronous mode

Internal clock, SCK pin available for generic input/output*

Synchronous mode

Internal clock, SCK pin used for serial clock output*

Asynchronous mode

Internal clock, SCK pin used for clock output*

Synchronous mode

Internal clock, SCK pin used for serial clock output

Asynchronous mode

External clock, SCK pin used for clock input*

Synchronous mode

External clock, SCK pin used for serial clock input

Asynchronous mode

External clock, SCK pin used for clock input*

Synchronous mode

External clock, SCK pin used for serial clock input

Notes: 1. Initial value

2. The output clock frequency is the same as the bit rate.

3. The input clock frequency is 16 times the bit rate.

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