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H8/3028F 数据表(PDF) 525 Page - Renesas Technology Corp |
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H8/3028F 数据表(HTML) 525 Page - Renesas Technology Corp |
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525 / 923 page ![]() Rev. 2.00, 09/03, page 495 of 890 Read RDRF flag in SSR No Yes Yes Yes No Yes Yes No No No Read ORER and FER flags in SSR (3) (1) (2) (4) (1) (2) (3) (4) (5) RDRF = 1 FER ∨ ORER = 1 FER ∨ ORER = 1 Start receiving Own ID? <End> RDRF = 1 Read RDRF flag in SSR Finished receiving? Read receive data from RDR Yes Clear RE bit to 0 in SCR (5) Error handling (continued on next page) SCI initialization: the receive data input function of the RxD pin is selected automatically. ID receive cycle: set the MPIE bit to 1 in SCR. SCI status check and ID check: read SSR, check that the RDRF flag is set to 1, then read data from RDR and compare it with the processor's own ID. If the ID does not match, set the MPIE bit to 1 again and clear the RDRF flag to 0. If the ID matches, clear the RDRF flag to 0. SCI status check and data receiving: read SSR, check that the RDRF flag is set to 1, then read data from RDR. Receive error handling and break detection: if a receive error occurs, read the ORER and FER flags in SSR to identify the error. After executing the necessary error handling, clear the ORER and FER flags both to 0. Receiving cannot resume while either the ORER or FER flag remains set to 1. When a framing error occurs, the RxD pin can be read to detect the break state. No Set MPIE bit to 1 in SCR Read ORER and FER flags in SSR Read RDRF flag in SSR Initialize Figure 13.12 Sample Flowchart for Receiving Multiprocessor Serial Data (1) |
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