H8SLASH3028F datasheet(606/923 Pages) RENESAS

606 / 923 page

Rev. 2.00, 09/03, page 576 of 890

18.2.2

Pin Configuration

The flash memory is controlled by means of the pins shown in table 18.2.

Table 18.2 Flash Memory Pins

Pin Name

Abbreviation

I/O

Function

Reset

RES

Input

Reset

Flash write enable

FWE

Input

Flash program/erase protection by hardware

Mode 2

MD2

Input

Sets H8/3028F-ZTAT operating mode

Mode 1

MD1

Input

Sets H8/3028F-ZTAT operating mode

Mode 0

MD0

Input

Sets H8/3028F-ZTAT operating mode

Transmit data

TxD1

Output

Serial transmit data output

Receive data

RxD1

Input

Serial receive data input

18.2.3

The registers used to control the on-chip flash memory when enabled are shown in table 18.3.

Table 18.3 Flash Memory Registers

Abbreviation

R/W

Initial Value

Address*

Flash memory control register 1

FLMCR1

R/W

H'00*

H'EE030

Flash memory control register 2

FLMCR2

H'00

H'EE031

Erase block register 1

EBR1

R/W

H'00

H'EE032

Erase block register 2

EBR2

R/W

H'00

H'EE033

RAM control register

RAMCR

R/W

H'F0

H'EE077

Notes: FLMCR1, FLMCR2, EBR1, EBR2, and RAMCR are 8-bit registers, and should be

accessed by byte access.

1. Lower 20 bits of address in advanced mode.

2. When a high level is input to the FWE pin, the initial value is H'80.

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