H8SLASH3028F datasheet(610/923 Pages) RENESAS

610 / 923 page

Rev. 2.00, 09/03, page 580 of 890

18.3.2

Flash Memory Control Register 2 (FLMCR2)

Bit

654321

FLER

——————

—

Initial value

Read/Write

RRRRRR

FLMCR2 is an 8-bit register used for flash memory operating mode control. FLMCR2 is

initialized to H'00 by a reset, and in hardware standby mode and software standby mode. When

the on-chip flash memory is disabled, a read will return H'00.

Note: FLMCR2 is a read-only register, and should not be written to.

Bit 7—Flash Memory Error (FLER): Indicates that an error has occurred during an operation on

flash memory (programming or erasing). When FLER is set to 1, flash memory goes to the error-

protection state.

Bit 7

FLER

Description

Flash memory is operating normally

Flash memory program/erase protection (error protection) is disabled

[Clearing condition]

Reset (

RES pin or WDT reset) or hardware standby mode

(Initial value)

An error occurred during flash memory programming/erasing

Flash memory program/erase protection (error protection) is enabled

[Setting conditions]

• When flash memory is read during programming/erasing (including a vector read

or instruction fetch, but excluding a read of the RAM area overlapping flash

memory space)

• Immediately after the start of exception handling during programming/erasing

(excluding reset, illegal instruction, trap instruction, and division-by-zero exception

handling)

• When a SLEEP instruction (including software standby) is executed during

programming/erasing

• When the bus is released during programming/erasing

Bits 6 to 0—Reserved: These bits are always read as 0.

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