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H8/3028F 数据表(PDF) 695 Page - Renesas Technology Corp

部件名 H8/3028F
功能描述  Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series
PDF  923 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

H8/3028F 数据表(HTML) 695 Page - Renesas Technology Corp

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Rev. 2.00, 09/03, page 665 of 890
21.2.3
AC Characteristics
Clock timing parameters are listed in table 21.13, control signal timing parameters in table 21.14,
and bus timing parameters in table 21.15. Timing parameters of the on-chip supporting modules
are listed in table 21.16.
Table 21.13 Clock Timing
Conditions: VCC = 3.0 V to 3.6 V, AVCC = 3.0 V to 3.6 V, VREF = 3.0 V to AVCC,
VSS = AVSS = 0 V, Ta = –20°C to +75°C (regular specifications),
Ta = –40°C to +85°C (wide-range specifications)
Condition
f = 2 M to 25 MHz
Item
Symbol
Min
Max
Unit
Test Conditions
Clock cycle time
tcyc
40
500
ns
Clock pulse low width
tCL
10
—
ns
Figure 21.7 to
figure 21.28
Clock pulse high width
tCH
10
—
ns
Clock rise time
tCr
—10
ns
Clock fall time
tCf
—10
ns
Clock oscillator settling time
at reset
tOSC1
20
—
ms
Figure 21.7
Clock oscillator settling time
in software standby
tOSC2
7
—
ms
Figure 20.1
Table 21.14 Control Signal Timing
Conditions: VCC = 3.0 V to 3.6 V, AVCC = 3.0 V to 3.6 V, VREF = 3.0 V to AVCC,
VSS = AVSS = 0 V, Ta = –20°C to +75°C (regular specifications),
Ta = –40°C to +85°C (wide-range specifications)
Condition
f = 2 M to 25 MHz
Item
Symbol
Min
Max
Unit
Test Conditions
RES setup time
tRESS
150
—
ns
Figure 21.8
RES pulse width
tRESW
20
—
tcyc
Mode programming setup time
tMDS
200
—
ns
NMI,
IRQ setup time
tNMIS
150
—
ns
Figure 21.10
NMI,
IRQ hold time
tNMIH
10
—
ns
NMI,
IRQ pulse width
tNMIW
200
—
ns



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