H8SLASH3028F datasheet(278/923 Pages) RENESAS

278 / 923 page

Rev. 2.00, 09/03, page 248 of 890

Table 8.1

Port Functions

Expanded Modes

Single-Chip Modes

Port

Description

Pins

Mode 1

Mode 2

Mode 3

Mode 4

Mode 5

Mode 6

Mode 7

Port 1 • 8-bit I/O port

• Can drive LEDs

P17 to P10/

A7 to A0

Address output pins (A7 to A0)

Address output (A7 to

A0) and generic input

DDR = 0:

generic input

DDR = 1:

address output

Generic input/output

Port 2 • 8-bit I/O port

• Built-in input pull-

up transistors

• Can drive LEDs

P27 to P20/

A15 to A8

Address output pins (A15 to A8)

Address output (A15 to

A8) and generic input

DDR = 0:

generic input

DDR = 1:

address output

Generic input/output

Port 3 • 8-bit I/O port

P37 to P30/

D15 to D8

Data input/output (D15 to D8)

Generic input/output

Port 4 • 8-bit I/O port

• Built-in input pull-

up transistors

P47 to P40/

D7 to D0

Data input/output (D7 to D0) and 8-bit generic input/output

8-bit bus mode: generic input/output

16-bit bus mode: data input/output

Generic input/output

Port 5 • 4-bit I/O port

• Built-in input pull-

up transistors

• Can drive LEDs

P53 to P50/

A19 to A16

Address output (A19 to A16)

Address output (A19 to

A16) and 4-bit

generic input

DDR = 0: generic input

DDR = 1: address output

Generic input/output

P67/φ

Clock output (

φ) and generic input

P66/LWR

P65/HWR

P64/RD

P63/AS

Bus control signal output (

LWR, HWR, RD, AS)

Generic input/output

Port 6 • 8-bit I/O port

P62/BACK

P61/BREQ

P60/WAIT

Bus control signal input/output (

BACK, BREQ, WAIT) and 3-bit generic input/output

P77/AN7/DA1

P76/AN6/DA0

Analog input (AN7, AN6) to A/D converter, analog output (DA1, DA0) from D/A converter, and generic

input

Port 7 • 8-bit I/O port

P75 to P70/

AN5 to AN0

Analog input (AN5 to AN0) to A/D converter, and generic input

P84/CS0

DDR = 0: generic input

DDR = 1 (reset value):

CS0 output

DDR = 0 (reset value):

generic input

DDR = 1:

CS0 output

Generic input/output

P83/IRQ3/

CS1/ADTRG

IRQ3 input, CS1 output, external trigger input (ADTRG) to A/D converter,

and generic input

DDR = 0 (after reset): generic input

DDR = 1:

CS1 output

IRQ3 input, external

trigger input (

ADTRG) to

A/D converter, and

generic input/output

P82/IRQ2/CS2

P81/IRQ1/CS3

IRQ2 and IRQ1 input, CS2 and CS3 output, and generic input*

DDR = 0 (reset value): generic input

DDR = 1:

CS2 and CS3 output

IRQ2 and IRQ1 input and

generic input/output

Port 8 • 5-bit I/O port

•P82 to P80 have

Schmitt inputs

P80/IRQ0/

RFSH

IRQ0 input, RFSH output, and generic input/output

IRQ0 input and generic

input/output

Note: * P81 can be used as an output port by making a setting in DRCRA.

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