H8SLASH3028F datasheet(281/923 Pages) RENESAS

281 / 923 page

Rev. 2.00, 09/03, page 251 of 890

8.2.2

Table 8.2 summarizes the registers of port 1.

Table 8.2

Port 1 Registers

Initial Value

Address*

Name

Abbreviation R/W

Modes 1 to 4

Modes 5 to 7

H'EE000

Port 1 data direction register P1DDR

H'FF

H'00

H'FFFD0

Port 1 data register

P1DR

R/W

H'00

Note: * Lower 20 bits of the address in advanced mode.

Port 1 Data Direction Register (P1DDR): P1DDR is an 8-bit write-only register that can select

input or output for each pin in port 1.

Bit

Modes

1 to 4

Initial value

Read/Write

Initial value

Read/Write

Modes

5 to 7

P1 DDR

—

P1 DDR

—

P1 DDR

—

P1 DDR

—

P1 DDR

—

P1 DDR

—

P1 DDR

—

P1 DDR

—

Port 1 data direction 7 to 0

These bits select input or

output for port 1 pins

Modes 1 to 4 (Expanded Modes with On-Chip ROM Disabled): P1DDR values are fixed at 1.

Port 1 functions as an address bus.

Mode 5 (Expanded Modes with On-Chip ROM Enabled): After a reset, port 1 functions as an

input port. A pin in port 1 becomes an address output pin if the corresponding P1DDR bit is set to

1, and a generic input pin if this bit is cleared to 0.

Modes 6 and 7 (Single-Chip Mode): Port 1 functions as an input/output port. A pin in port 1

becomes an output port if the corresponding P1DDR bit is set to 1, and an input port if this bit is

cleared to 0.

In modes 1 to 4, P1DDR bits are always read as 1, and cannot be modified.

In modes 5 to 7, P1DDR is a write-only register. Its value cannot be read. All bits return 1 when

read.

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