H8SLASH3028F datasheet(288/923 Pages) RENESAS

288 / 923 page

Rev. 2.00, 09/03, page 258 of 890

Port 3 Data Direction Register (P3DDR): P3DDR is an 8-bit write-only register that can select

input or output for each pin in port 3.

Bit

Initial value

Read/Write

P3 DDR

Port 3 data direction 7 to 0

These bits select input or output for port 3 pins

P3 DDR

Modes 1 to 5 (Expanded Modes): Port 3 functions as a data bus, regardless of the P3DDR

settings.

Modes 6 and 7 (Single-Chip Mode): Port 3 functions as an input/output port. A pin in port 3

becomes an output port if the corresponding P3DDR bit is set to 1, and an input port if this bit is

cleared to 0.

P3DDR is a write-only register. Its value cannot be read. All bits return 1 when read.

P3DDR is initialized to H'00 by a reset and in hardware standby mode. In software standby mode

it retains its previous setting. Therefore, if a transition is made to software standby mode while

port 3 is functioning as an input/output port and a P3DDR bit is set to 1, the corresponding pin

maintains its output state.

Port 3 Data Register (P3DR): P3DR is an 8-bit readable/writable register that stores output data

for port 3. When port 3 functions as an output port, the value of this register is output. When a bit

in P3DDR is set to 1, if port 3 is read the value of the corresponding P3DR bit is returned. When a

bit in P3DDR is cleared to 0, if port 3 is read the corresponding pin logic level is read.

Bit

Initial value

Read/Write

R/W

Port 3 data 7 to 0

These bits store data for port 3 pins

R/W

P3DR is initialized to H'00 by a reset and in hardware standby mode. In software standby mode it

retains its previous setting.

H8/3028F 数据表(PDF) 288 Page - Renesas Technology Corp