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H8/3028F 数据表(PDF) 293 Page - Renesas Technology Corp |
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H8/3028F 数据表(HTML) 293 Page - Renesas Technology Corp |
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293 / 923 page ![]() Rev. 2.00, 09/03, page 263 of 890 8.6 Port 5 8.6.1 Overview Port 5 is a 4-bit input/output port with the pin configuration shown in figure 8.5. The pin functions differ depending on the operating mode. In modes 1 to 4 (expanded modes with on-chip ROM disabled), port 5 consists of address output pins (A19 to A16). In mode 5 (expanded modes with on-chip ROM enabled), settings in the port 5 data direction register (P5DDR) designate pins for address bus output (A19 to A16) or generic input. In modes 6, 7 (single-chip mode), port 5 is a generic input/output port. Port 5 has software-programmable built-in pull-up transistors. Pins in port 5 can drive one TTL load and a 90-pF capacitive load. They can also drive an LED or a darlington transistor pair. Port 5 P5 /A P5 /A P5 /A P5 /A 3 2 1 0 19 18 17 16 A (output) A (output) A (output) A (output) 19 18 17 16 P5 (input)/A (output) P5 (input)/A (output) P5 (input)/A (output) P5 (input)/A (output) 3 2 1 0 Port 5 pins Modes 1 to 4 Mode 5 P5 (input/output) P5 (input/output) P5 (input/output) P5 (input/output) 3 2 1 0 Modes 6 and 7 19 18 17 16 Figure 8.5 Port 5 Pin Configuration 8.6.2 Register Descriptions Table 8.8 summarizes the registers of port 5. Table 8.8 Port 5 Registers Initial Value Address* Name Abbreviation R/W Modes 1 to 4 Modes 5 to 7 H'EE004 Port 5 data direction register P5DDR W H'FF H'F0 H'FFFD4 Port 5 data register P5DR R/W H'F0 H'F0 H'EE03F Port 5 input pull-up control register P5PCR R/W H'F0 H'F0 Note: * Lower 20 bits of the address in advanced mode. |
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