AD9520-2SLASHPCBZ datasheet(14/84 Pages) AD

14 / 84 page

AD9520-2

Rev. 0 | Page 14 of 84

SERIAL CONTROL PORT—I²C MODE

Table 14.

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

SDA, SCL (WHEN INPUTTING DATA)

Input Logic 1 Voltage

0.7 × VS

Input Logic 0 Voltage

0.3 × VS

Input Current with an Input Voltage Between 0.1 × VS

and 0.9 × VS

−10

+10

μA

Hysteresis of Schmitt Trigger Inputs

0.015 × VS

Pulse Width of Spikes That Must Be Suppressed by the

Input Filter, tSPIKE

SDA (WHEN OUTPUTTING DATA)

Output Logic 0 Voltage at 3 mA Sink Current

0.4

Output Fall Time from VIHMIN to VILMAX with a Bus

Capacitance from 10 pF to 400 pF

20 + 0.1 Cb

250

(Cb = capacitance of one bus line in pF)

TIMING

Note that all I2C timing values

referred to VIHMIN (0.3 × VS) and

VILMAX levels (0.7 × VS)

Clock Rate (SCL, fI2C)

400

kHz

Bus Free Time Between a Stop and Start Condition, tIDLE

1.3

μs

Setup Time for a Repeated Start Condition, tSET; STR

0.6

μs

Hold Time (Repeated) Start Condition (After This Period,

the First Clock Pulse Is Generated), tHLD; STR

0.6

μs

Setup Time for Stop Condition, tSET; STP

0.6

μs

Low Period of the SCL Clock, tLOW

1.3

μs

High Period of the SCL Clock, tHIGH

0.6

μs

SCL, SDA Rise Time, tRISE

20 + 0.1 Cb

300

SCL, SDA Fall Time, tFALL

20 + 0.1 Cb

300

Data Setup Time, tSET; DAT

120

This is a minor deviation from

the original I²C specification of

100 ns minimum

Data Hold Time, tHLD; DAT

140

880

This is a minor deviation from

the original I²C specification of

0 ns minimum1

Capacitive Load for Each Bus Line, Cb

400

1 According to the original I2C specification, an I2C master must also provide a minimum hold time of 300 ns for the SDA signal to bridge the undefined region of the SCL

falling edge.

AD9520-2/PCBZ 数据表(PDF) 14 Page - Analog Devices

AD9520-2/PCBZ 数据表(HTML) 14 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84

数据表下载

链接网址

AD9520-2/PCBZ 数据表(PDF) 14 Page - Analog Devices

AD9520-2/PCBZ 数据表(HTML) 14 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84

数据表 下载

链接网址

数据表下载