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AD9520-2/PCBZ 数据表(PDF) 19 Page - Analog Devices

部件名 AD9520-2/PCBZ
功能描述  12 LVPECL/24 CMOS Output Clock Generator with Integrated 2.2 GHz VCO
PDF  84 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD9520-2/PCBZ 数据表(HTML) 19 Page - Analog Devices

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AD9520-2
Rev. 0 | Page 19 of 84
Pin No.
Input/
Output
Pin
Type
Mnemonic
Description
15
I
3.3 V CMOS
CS
Serial Control Port Chip Select; Active Low. This pin has an internal 30 kΩ pull-up
resistor.
16
I
3.3 V CMOS
SCLK/SCL
Serial Control Port Clock Signal. This pin has an internal 30 kΩ pull-down resistor
in SPI mode but is high impedance in I²C mode.
17
I/O
3.3 V CMOS
SDIO/SDA
Serial Control Port Bidirectional Serial Data In/Out.
18
O
3.3 V CMOS
SDO
Serial Control Port Unidirectional Serial Data Out.
19, 59
I
GND
GND
Ground Pins.
20
I
Three-level
logic
SP1
Select SPI or I²C as the serial interface port and select the I²C slave address in I²C
mode. Three-level logic. This pin is internally biased for the open logic level.
21
I
Three-level
logic
SP0
Select SPI or I²C as the serial interface port and select the I²C slave address in I²C
mode. Three-level logic. This pin is internally biased for the open logic level.
22
I
3.3 V CMOS
EEPROM
Setting this pin high selects the register values stored in the internal EEPROM to
be loaded at reset and/or power-up. Setting this pin low causes the AD9520 to
load the hard-coded default register values at power-up/reset. This pin has an
internal 30 kΩ pull-down resistor.
23
I
3.3 V CMOS
RESET
Chip Reset, Active Low. This pin has an internal 30 kΩ pull-up resistor.
24
I
3.3 V CMOS
PD
Chip Power-Down, Active Low. This pin has an internal 30 kΩ pull-up resistor.
25
O
LVPECL or
CMOS
OUT9 (OUT9A)
Clock Output. This pin can be configured as one side of a differential LVPECL
output or as a single-ended CMOS output.
26
O
LVPECL or
CMOS
OUT9 (OUT9B)
Clock Output. This pin can be configured as one side of a differential LVPECL
output or as a single-ended CMOS output.
27, 35,
46, 54
I
Power
VS_DRV
Output Driver Power Supply Pins. As a group, these pins can be set to either
2.5 V or 3.3 V. All four pins must be set to the same voltage.
28
O
LVPECL or
CMOS
OUT10 (OUT10A)
Clock Output. This pin can be configured as one side of a differential LVPECL
output or as a single-ended CMOS output.
29
O
LVPECL or
CMOS
OUT10 (OUT10B)
Clock Output. This pin can be configured as one side of a differential LVPECL
output or as a single-ended CMOS output.
30
O
LVPECL or
CMOS
OUT11 (OUT11A)
Clock Output. This pin can be configured as one side of a differential LVPECL
output or as a single-ended CMOS output.
31
O
LVPECL or
CMOS
OUT11 (OUT11B)
Clock Output. This pin can be configured as one side of a differential LVPECL
output or as a single-ended CMOS output.
33
O
LVPECL or
CMOS
OUT6 (OUT6A)
Clock Output. This pin can be configured as one side of a differential LVPECL
output or as a single-ended CMOS output.
34
O
LVPECL or
CMOS
OUT6 (OUT6B)
Clock Output. This pin can be configured as one side of a differential LVPECL
output or as a single-ended CMOS output.
36
O
LVPECL or
CMOS
OUT7 (OUT7A)
Clock Output. This pin can be configured as one side of a differential LVPECL
output, or as a single-ended CMOS output.
37
O
LVPECL or
CMOS
OUT7 (OUT7B)
Clock Output. This pin can be configured as one side of a differential LVPECL
output or as a single-ended CMOS output.
38
O
LVPECL or
CMOS
OUT8 (OUT8A)
Clock Output. This pin can be configured as one side of a differential LVPECL
output or as a single-ended CMOS output.
39
O
LVPECL or
CMOS
OUT8 (OUT8B)
Clock Output. This pin can be configured as one side of a differential LVPECL
output or as a single-ended CMOS output.
42
O
LVPECL or
CMOS
OUT5 (OUT5B)
Clock Output. This pin can be configured as one side of a differential LVPECL
output or as a single-ended CMOS output.
43
O
LVPECL or
CMOS
OUT5 (OUT5A)
Clock Output. This pin can be configured as one side of a differential LVPECL
output or as a single-ended CMOS output.
44
O
LVPECL or
CMOS
OUT4 (OUT4B)
Clock Output. This pin can be configured as one side of a differential LVPECL
output or as a single-ended CMOS output.
45
O
LVPECL or
CMOS
OUT4 (OUT4A)
Clock Output. This pin can be configured as one side of a differential LVPECL
output or as a single-ended CMOS output.
47
O
LVPECL or
CMOS
OUT3 (OUT3B)
Clock Output. This pin can be configured as one side of a differential LVPECL
output or as a single-ended CMOS output.



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