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AD9520-2/PCBZ 数据表(PDF) 22 Page - Analog Devices

部件名 AD9520-2/PCBZ
功能描述  12 LVPECL/24 CMOS Output Clock Generator with Integrated 2.2 GHz VCO
PDF  84 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD9520-2/PCBZ 数据表(HTML) 22 Page - Analog Devices

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AD9520-2
Rev. 0 | Page 22 of 84
–208
–210
–212
–214
–216
–218
–220
–222
–224
0
0.4
0.8
1.2
0.2
0.6
1.0
1.4
INPUT SLEW RATE (V/ns)
DIFFERENTIAL INPUT
SINGLE-ENDED INPUT
Figure 12. PLL Figure of Merit (FOM) vs. Slew Rate at REFIN/REFIN
1.9
1.8
1.7
1.6
1.5
1.4
1.3
1.2
2.0
2.4
2.3
2.2
2.1
FREQUENCY (GHz)
Figure 13. VCO Tuning Voltage vs. Frequency
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
100
145
140
135
130
125
120
115
110
105
FREQUENCY (MHz)
Figure 14. PFD/CP Spurs; 122.88 MHz; PFD = 15.36 MHz;
LBW = 127 kHz; ICP = 3.0 mA; fVCO = 2212 MHz
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
122.38
122.58
122.78
122.98
123.18
123.38
FREQUENCY (MHz)
Figure 15. Output Spectrum, LVPECL; 122.88 MHz; PFD = 15.36 MHz;
LBW = 127 kHz; ICP = 3.0 mA; fVCO = 2212 MHz
3.5
0
0.5
1.0
1.5
2.0
2.5
3.0
10k
1k
100
RESISTIVE LOAD (Ω)
VS_DRV = 3.135V
VS_DRV = 2.35V
VS_DRV = 3.3V
VS_DRV = 2.5V
Figure 16. CMOS Output VOH (Static) vs. RLOAD (to Ground)
1.2
0.8
0.4
0
–0.4
–0.8
–1.2
02
22
20
18
16
14
12
10
8
6
4
2
TIME (ns)
4
Figure 17. LVPECL Output (Differential) @ 100 MHz



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