MPC5633MMLL60 datasheet(34/106 Pages) FREESCALE

34 / 106 page

MPC5634M Microcontroller Data Sheet, Rev. 8

Freescale Semiconductor

2.3.20

Debug features

2.3.20.1

Nexus port controller

The NPC (Nexus Port Controller) block provides real-time development support capabilities for the MPC5634M Power

Architecture-based MCU in compliance with the IEEE-ISTO 5001-2003 standard. This development support is supplied for

MCUs without requiring external address and data pins for internal visibility. The NPC block is an integration of several

individual Nexus blocks that are selected to provide the development support interface for the MPC5634M. The NPC block

interfaces to the host processor (e200z335), eTPU, and internal buses to provide development support as per the IEEE-ISTO

5001-2003 standard. The development support provided includes program trace and run-time access to the MCUs internal

memory map and access to the Power Architecture and eTPU internal registers during halt. The Nexus interface also supports

a JTAG only mode using only the JTAG pins. MPC5634M in the production 144 LQFP supports a 3.3 V reduced (4-bit wide)

Auxiliary port. These Nexus port pins can also be used as 5 V I/O signals to increase usable I/O count of the device. When using

this Nexus port as IO, Nexus trace is still possible using VertiCal calibration. In the VertiCal calibration package, the full 12-bit

Auxiliary port is available.

NOTE

In the VertiCal package, the full Nexus Auxiliary port shares balls with the addresses of the

calibration bus. Therefore multiplexed address/data bus mode must be used for the

calibration bus when using full width Nexus trace in VertiCal assembly.

The following features are implemented:

•

5-pin JTAG port (JCOMP, TDI, TDO, TMS, and TCK)

— Always available in production package

— Supports both JTAG Boundary Scan and debug modes

— 3.3 V interface

— Supports Nexus class 1 features

— Supports Nexus class 3 read/write feature

•

9-pin Reduced Port interface in 144 LQFP production package

— Alternate function as IO

— 5 V (in GPIO or alternate function mode), 3.3 V (in Nexus mode) interface

— Auxiliary Output port

– 1 MCKO (message clock out) pin

– 4 MDO (message data out) pins

–2 MSEO (message start/end out) pins

–1 EVTO (event out) pin

— Auxiliary input port

– 1 EVTI (event in) pin

•

17-pin Full Port interface in VertiCal calibration package

— 3.3 V interface

— Auxiliary Output port

– 1 MCKO (message clock out) pin

– 4 (reduced port mode) or 12 (full port mode) MDO (message data out) pins; 8 extra full port pins shared with

calibration bus

–2 MSEO (message start/end out) pins

–1 EVTO (event out) pin

— Auxiliary input port

– 1 EVTI (event in) pin

MPC5633MMLL60 数据表(PDF) 34 Page - Freescale Semiconductor, Inc

MPC5633MMLL60 数据表(HTML) 34 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载