MPC5633MMLL60 datasheet(67/106 Pages) FREESCALE

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MPC5634M Microcontroller Data Sheet, Rev. 8

Freescale Semiconductor

4.3

Thermal characteristics

8 AC signal overshoot and undershoot of up to 2.0 V of the input voltages is permitted for an accumulative duration of

60 hours over the complete lifetime of the device (injection current not limited for this duration).

9 Internal structures hold the voltage greater than –1.0 V if the injection current limit of 2 mA is met.

10 Internal structures hold the input voltage less than the maximum voltage on all pads powered by V

DDEH supplies, if

the maximum injection current specification is met (2 mA for all pins) and VDDEH is within the operating voltage

specifications.

11 Internal structures hold the input voltage less than the maximum voltage on all pads powered by V

DDE supplies, if the

maximum injection current specification is met (2 mA for all pins) and VDDE is within the operating voltage

specifications.

12 Total injection current for all pins (including both digital and analog) must not exceed 25 mA.

13 Total injection current for all analog input pins must not exceed 15 mA.

14 Lifetime operation at these specification limits is not guaranteed.

15 Solder profile per CDF-AEC-Q100.

16 Moisture sensitivity per JEDEC test method A112.

Table 9. Thermal characteristics for 144-pin LQFP

Symbol

Parameter

Conditions

Value

Unit

RJA

D Junction-to-Ambient, Natural Convection1

1 Junction-to-Ambient Thermal Resistance determined per JEDEC JESD51-3 and JESD51-6. Thermal test board

meets JEDEC specification for this package.

Single layer board – 1s

°C/W

RJA

D Junction-to-Ambient, Natural Convection2

Four layer board – 2s2p

°C/W

RJMA

D Junction-to-Ambient (@200 ft/min)2

Single layer board –1s

°C/W

RJMA

D Junction-to-Ambient (@200 ft/min)2

Four layer board – 2s2p

°C/W

RJB

D Junction-to-Board2

2 Junction-to-Board thermal resistance determined per JEDEC JESD51-8. Thermal test board meets JEDEC

specification for the specified package.

°C/W

RJCtop

D Junction-to-Case (Top)3

3 Junction-to-Case at the top of the package determined using MIL-STD 883 Method 1012.1. The cold plate

temperature is used for the case temperature. Reported value includes the thermal resistance of the interface layer.

8°C/W



D Junction-to-Package Top, Natural

Convection4

4 Thermal characterization parameter indicating the temperature difference between the package top and the

junction temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization

parameter is written as Psi-JT.

2°C/W

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