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MPC5633MMLL60 数据表(PDF) 9 Page - Freescale Semiconductor, Inc |
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MPC5633MMLL60 数据表(HTML) 9 Page - Freescale Semiconductor, Inc |
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9 / 106 page ![]() MPC5634M Microcontroller Data Sheet, Rev. 8 Freescale Semiconductor 9 1 Introduction 1.1 Document overview This document provides an overview and describes the features of the MPC5634M series of microcontroller units (MCUs). For functional characteristics, refer to the device reference manual. Electrical specifications and package mechanical drawings are included in this device data sheet. Pin assignments can be found in both the reference manual and data sheet. 1.2 Description These 32-bit automotive microcontrollers are a family of system-on-chip (SoC) devices that contain all the features of the MPC5500 family and many new features coupled with high performance 90 nm CMOS technology to provide substantial reduction of cost per feature and significant performance improvement. The advanced and cost-efficient host processor core of this automotive controller family is built on Power Architecture® technology. This family contains enhancements that improve the architecture’s fit in embedded applications, includes additional instruction support for digital signal processing (DSP), integrates technologies—such as an enhanced time processor unit, enhanced queued analog-to-digital converter, Controller Area Network, and an enhanced modular input-output system—that are important for today’s lower-end powertrain applications. This device family is a completely compatible extension to Freescale’s MPC5500 family. The device has a single level of memory hierarchy consisting of up to 94 KB on-chip SRAM and up to 1.5 MB of internal flash memory. The device also has an external bus interface (EBI) for ‘calibration’. This external bus interface has been designed to support most of the standard memories used with the MPC5xx and MPC55xx families. |
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