MPC8313VRGDDB datasheet(36/100 Pages) FREESCALE

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MPC8313E PowerQUICC™ II Pro Processor Hardware Specifications, Rev. 2.1

Freescale Semiconductor

High-Speed Serial Interfaces (HSSI)

Figure 21 shows the MII management AC timing diagram.

Figure 21. MII Management Interface Timing Diagram

High-Speed Serial Interfaces (HSSI)

This section describes the common portion of SerDes DC electrical specifications, which is the DC

requirement for SerDes reference clocks. The SerDes data lane’s transmitter and receiver reference circuits

are also shown.

9.1

Signal Terms Definition

The SerDes utilizes differential signaling to transfer data across the serial link. This section defines terms

used in the description and specification of differential signals.

Figure 22 shows how the signals are defined. For illustration purpose, only one SerDes lane is used for

description. The figure shows waveform for either a transmitter output (TXn and TXn) or a receiver input

(RXn and RXn). Each signal swings between A volts and B volts where A > B.

Using this waveform, the definitions are as follows. To simplify illustration, the following definitions

assume that the SerDes transmitter and receiver operate in a fully symmetrical differential signaling

environment.

1. Single-ended swing

The transmitter output signals and the receiver input signals TXn, TXn, RXn, and RXn each have

a peak-to-peak swing of A – B volts. This is also referred as each signal wire’s single-ended swing.

2. Differential output voltage, VOD (or differential output swing):

The differential output voltage (or swing) of the transmitter, VOD, is defined as the difference of

the two complimentary output voltages: VTXn – VTXn. The VOD value can be either positive or

negative.

3. Differential input voltage, VID (or differential input swing):

The differential input voltage (or swing) of the receiver, VID, is defined as the difference of the two

complimentary input voltages: VRXn – VRXn. The VID value can be either positive or negative.

MDC

tMDDXKH

tMDC

tMDCH

tMDCR

tMDCF

tMDDVKH

tMDKHDX

MDIO

(Input)

(Output)

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