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MPC8313VRGDDB 数据表(PDF) 46 Page - Freescale Semiconductor, Inc

部件名 MPC8313VRGDDB
功能描述  PowerQUICC??II Pro Processor Hardware Specifications
PDF  100 Pages
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制造商  FREESCALE [Freescale Semiconductor, Inc]
网页  http://www.freescale.com
标志 FREESCALE - Freescale Semiconductor, Inc

MPC8313VRGDDB 数据表(HTML) 46 Page - Freescale Semiconductor, Inc

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MPC8313E PowerQUICCII Pro Processor Hardware Specifications, Rev. 2.1
46
Freescale Semiconductor
USB
10.1.2
USB AC Electrical Specifications
Table 42 describes the general timing parameters of the USB interface.
Figure 34 and Figure 35 provide the AC test load and signals for the USB, respectively.
Figure 34. USB AC Test Load
Figure 35. USB Signals
10.2
On-Chip USB PHY
This section describes the DC and AC electrical specifications for the on-chip USB PHY of the
MPC8313E. See Chapter 7 in the USB Specifications Rev. 2, for more information.
Table 42. USB General Timing Parameters (ULPI Mode Only)
Parameter
Symbol1
Min
Max
Unit
Notes
USB clock cycle time
tUSCK
15
ns
Input setup to USB clock—all inputs
tUSIVKH
4—
ns
input hold to USB clock—all inputs
tUSIXKH
1—
ns
USB clock to output valid—all outputs
tUSKHOV
—7
ns
Output hold from USB clock—all outputs
tUSKHOX
2—
ns
Note:
1. The symbols used for timing specifications follow the pattern of t(first two letters of functional block)(signal)(state)(reference)(state) for
inputs and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tUSIXKH symbolizes USB timing
(USB) for the input (I) to go invalid (X) with respect to the time the USB clock reference (K) goes high (H). Also, tUSKHOX
symbolizes us timing (USB) for the USB clock reference (K) to go high (H), with respect to the output (O) going invalid (X) or
output hold time.
Output
Z0 = 50 Ω
NVDD/2
RL = 50 Ω
Output Signals
tUSKHOV
USBDR_CLK
Input Signals
tUSIXKH
tUSIVKH
tUSKHOX



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