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数据搜索系统，热门电子元器件搜索 |
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ATtiny13A 数据表(PDF) 69 Page - ATMEL Corporation |
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ATtiny13A 数据表(HTML) 69 Page - ATMEL Corporation |
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69 / 174 page  69 8126D–AVR–11/09 ATtiny13A Figure 11-8. Timer/Counter Timing Diagram, no Prescaling Figure 11-9 shows the same timing data, but with the prescaler enabled. Figure 11-9. Timer/Counter Timing Diagram, with Prescaler (fclk_I/O/8) Figure 11-10 shows the setting of OCF0B in all modes and OCF0A in all modes except CTC mode and PWM mode, where OCR0A is TOP. Figure 11-10. Timer/Counter Timing Diagram, Setting of OCF0x, with Prescaler (fclk_I/O/8) clk Tn (clk I/O/1) TOVn clk I/O TCNTn MAX - 1 MAX BOTTOM BOTTOM + 1 TOVn TCNTn MAX - 1 MAX BOTTOM BOTTOM + 1 clk I/O clk Tn (clk I/O/8) OCFnx OCRnx TCNTn OCRnx Value OCRnx - 1 OCRnx OCRnx + 1 OCRnx + 2 clk I/O clk Tn (clk I/O/8) |
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