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KM416RD8ACD-RK80 数据表(PDF) 44 Page - Samsung semiconductor

部件名 KM416RD8ACD-RK80
功能描述  128/144Mbit RDRAM 256K x 16/18 bit x 2*16 Dependent Banks Direct RDRAMTM
PDF  64 Pages
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制造商  SAMSUNG [Samsung semiconductor]
网页  http://www.samsung.com/Products/Semiconductor
标志 SAMSUNG - Samsung semiconductor

KM416RD8ACD-RK80 数据表(HTML) 44 Page - Samsung semiconductor

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Page 41
KM416RD8AC(D)/KM418RD8AC(D)
Direct RDRAM™
Rev. 1.01 Oct. 1999
Figure 48: NAP and PDN Exit
Figure 49: NAP Entry/Exit Windows (left) and PDN Entry/Exit Windows (right)
CTM/CFM
DQA8..0
DQB8..0
COL4
..COL0
ROW2
..ROW0
T0
T4
T8
T12
T1
T5
T9
T13
T2
T6
T10
T14
T3
T7
T11
T15 T16
T20
T24
T28
T17
T21
T25
T29
T18
T22
T26
T30
T19
T23
T27
T31 T32
T36
T40
T44
T33
T37
T41
T45
T34
T38
T42
T46
T35
T39
T43
T47
ROP
DQS=0 b,c
SCK
CMD
SIO0
SIO1
0
1
0/1a
0/1a
PDEV5..0b
PDEV5..0b
DQS=1 b
tS3
tS3
tH3
tH3
tCE
a Use 0 for NAP exit, 1 for PDN exit
b Device selection timing slot is selected by DQS field of NAPX register
The packet is repeated
from SIO0 to SIO1
restricted
Power
State
DQS=0 b
DQS=1b
d Exit to STBY or ATTN depends upon whether RLXR was
asserted at NAP or PDN entry time
tS4 tH4
STBY/ATTNd
NAP/PDN
(NAPX)•t SCYCLE)/(256•PDNX•t SCYCLE)
restricted
tS4 tH4
COP
XOP
No ROW packets may
overlap the restricted interval
No COL packets may
overlap the restricted interval
if device PDEV is exiting the
NAP-A or PDN-A states
ROP
COP
XOP
c The DQS field must be written with “1” for this RDRAM.
If PSX=1 in Init register, then
NAP/PDN exit is broadcast
(no PDEV field).
Effective hold becomes
tH4’=t H4+[PDNXA •64 •t SCYCLE+tPDNXB,MAX]-[PDNX •256 •t SCYCLE]
if [PDNX • 256 • t SCYCLE] < [PDNXA •64 •t SCYCLE+tPDNXB,MAX].
CTM/CFM
CMD
SCK
ROW2
..ROW0
T0
T4
T8
T12
T1
T5
T9
T13
T2
T6
T10
T14
T3
T7
T11
T15 T16
T20
T17
T21
T18
T22
T19
T23
NAPR
T0
T4
T8
T12
T1
T5
T9
T13
T2
T6
T10
T14
T3
T7
T11
T15 T16
T20
T17
T21
T18 T19
tNU0
tNU0 = 5•t CYCLE + (2+NAPX)•t SCYCLE
no entry to NAP or PDN
tNU1 = 8•t CYCLE - (0.5•t SCYCLE)
PDNR
no exit
tNU1
tPU0
no exit
tPU1
= 23•t CYCLE
if NSR=0
if NSR=1
tPU0 = 5 •t CYCLE + (2+256 •PDNX) •t SCYCLE
tPU1 = 8 •t CYCLE - (0.5 •t SCYCLE)
= 23 • t CYCLE
if PSR=0
if PSR=1
NAP entry
PDN entry
no entry to NAP or PDN
0
1
NAP exit
0
1
PDN exit
0
1
CTM/CFM
CMD
SCK
ROW2
..ROW0
0
1



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