KM416RD8ACD-RK80 datasheet(63/64 Pages) SAMSUNG

63 / 64 page

Page 60

KM416RD8AC(D)/KM418RD8AC(D)

Direct RDRAM™

Rev. 1.01 Oct. 1999

NOXOP

No-operation command in XOP field.

NSR

INIT register field- NAP self-refresh.

packet

A collection of bits carried on the Channel.

PDN

Power state - needs SCK/CMD wakeup.

PDNR

Powerdown command in ROP field.

PDNXA

Control register - PDN exit delay A.

PDNXB

Control register - PDN exit delay B.

pin efficiency

The fraction of non-idle cycles on a pin.

PRE

PREC,PRER,PREX precharge commands.

PREC

Precharge command in COP field.

precharge

Prepares sense amp and bank for activate.

PRER

Precharge command in ROP field.

PREX

Precharge command in XOP field.

PSX

INIT register field - PDN/NAP exit.

PSR

INIT register field - PDN self-refresh.

PVER

CNFGB register field - protocol version.

Read data packet on DQ pins.

Row address field of ROWA packet.

RBIT

CNFGB register field - # row address bits.

RD/RDA

Read (/precharge) command in COP field.

read

Operation of accesssing sense amp data.

receive

Moving information from the Channel into

the RDRAM (a serial stream is demuxed).

REFA

Refresh-activate command in ROP field.

REFB

Control register - next bank (self-refresh).

REFBIT

CNFGA register field - ignore bank bits

(for REFA and self-refresh).

REFP

Refresh-precharge command in ROP field.

REFR

Control register - next row for REFA.

refresh

Periodic operations to restore storage cells.

retire

The automatic operation that stores write

buffer into sense amp after WR command.

RLX

RLXC,RLXR,RLXX relax commands.

RLXC

Relax command in COP field.

RLXR

Relax command in ROP field.

RLXX

Relax command in XOP field.

ROP

Row-opcode field in ROWR packet.

row

2CBIT dualocts of cells (bank/sense amp).

ROW

Pins for row-access control

ROW

ROWA or ROWR packets on ROW pins.

ROWA

Activate packet on ROW pins.

ROWR

Row operation packet on ROW pins.

Alternate name for ROW/COL pins.

RSL

Rambus Signaling Levels.

SAM

Sample (IOL) command in XOP field.

Serial address packet for control register

transactions w/ SA address field.

SBC

Serial broadcast field in SRQ.

SCK

CMOS clock pin.

Serial data packet for control register

transactions w/ SD data field.

SDEV

Serial device address in SRQ packet.

SDEVID

INIT register field - Serial device ID.

self-refresh

Refresh mode for PDN and NAP.

sense amp

Fast storage that holds copy of bank’s row.

SETF

Set fast clock command from SOP field.

SETR

Set reset command from SOP field.

SINT

Serial interval packet for control register

read/write transactions.

SIO0,SIO1

CMOS serial pins for control registers.

SOP

Serial opcode field in SRQ.

SRD

Serial read opcode command from SOP.

SRP

INIT register field - Serial repeat bit.

SRQ

Serial request packet for control register

read/write transactions.

STBY

Power state - ready for ROW packets.

SVER

Control register - stepping version.

SWR

Serial write opcode command from SOP.

TCAS

TCLSCAS register field - tCAS core delay.

TCLS

TCLSCAS register field - tCLS core delay.

TCLSCAS

Control register - tCAS and tCLS delays.

TCYCLE

Control register - tCYCLE delay.

TDAC

Control register - tDAC delay.

TEST77

Control register - for test purposes.

TEST78

Control register - for test purposes.

TRDLY

Control register - tRDLY delay.

transaction

ROW,COL,DQ packets for memory

access.

transmit

Moving information from the RDRAM

onto the Channel (parallel word is muxed).

WR/WRA

Write (/precharge) command in COP field.

write

Operation of modifying sense amp data.

XOP

Extended opcode field in COLX packet

KM416RD8ACD-RK80 数据表(PDF) 63 Page - Samsung semiconductor

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