MSC8152SVT1000B datasheet(25/68 Pages) FREESCALE

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Electrical Characteristics

MSC8152 Dual-Core Digital Signal Processor Data Sheet, Rev. 1

Freescale Semiconductor

2.3

Thermal Characteristics

Table 4 describes thermal characteristics of the MSC8152 for the FC-PBGA packages.

2.4

CLKIN Requirements

Table 5 summarizes the required characteristics for the CLKIN signal.

Table 4. Thermal Characteristics for the MSC8152

Characteristic

Symbol

FC-PBGA

× 29 mm2

Unit

Natural

Convection

200 ft/min

(1 m/s) airflow

Junction-to-ambient1, 2

RθJA

°C/W

Junction-to-ambient, four-layer board1, 2

RθJA

°C/W

Junction-to-board (bottom)3

RθJB

°C/W

Junction-to-case4

RθJC

0.6

°C/W

Notes:

Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting site (board)

temperature, ambient temperature, air flow, power dissipation of other components on the board, and board thermal

resistance.

Junction-to-ambient thermal resistance determined per JEDEC JESD51-3 and JESDC51-6. Thermal test board meets JEDEC

specification for the specified package.

Junction-to-board thermal resistance determined per JEDEC JESD 51-8. Thermal test board meets JEDEC specification for

the specified package.

Junction-to-case at the top of the package determined using MIL- STD-883 Method 1012.1. The cold plate temperature is used

for the case temperature. Reported value includes the thermal resistance of the interface layer

Table 5. CLKIN Requirements

Parameter/Condition1

Symbol

Min

Typ

Max

Unit

Notes

CLKIN duty cycle

—

CLKIN slew rate

—

V/ns

CLKIN peak period jitter

—

±150

—

CLKIN jitter phase noise at –56 dBc

—

500

KHz

AC input swing limits

ΔVAC

1.5

—

Input capacitance

CIN

——

—

Notes:

For clock frequencies, see the Clock chapter in the MSC8152 Reference Manual.

Measured at the rising edge and/or the falling edge at VDDIO/2.

Slew rate as measured from ±20% to 80% of voltage swing at clock input.

Phase noise is calculated as FFT of TIE jitter.

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