MSC8152SVT1000B datasheet(63/68 Pages) FREESCALE

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Hardware Design Considerations

MSC8152 Dual-Core Digital Signal Processor Data Sheet, Rev. 1

Freescale Semiconductor

3.5.5

Miscellaneous Pins

Table 49 lists the board connections for the pins not required by the system design. Table 49 assumes that the alternate function

of the specified pin is not used. If the alternate function is used, connect that pin as required to support the selected function.

Note:

For details on configuration, see the MSC8152 Reference Manual. For additional information, refer to the MSC815x

and MSC825x DSP Family Design Checklist.

TDMnTCLK

GND

TDMTnDAT

GND

TDMnTSYN

GND

VDDIO

2.5 V

Notes:

n = {0, 1, 2,3}

In case of subset of TDM interface usage please make sure to disable unused TDM modules. See TDM chapter in the

MSC8152 Reference Manual for details.

Table 49. Connectivity of Individual Pins When They Are Not Required

Signal Name

Pin Connection

CLKOUT

EE0

GND

EE1

GPIO[31–0]

SCL

See the GPIO connectivity guidelines in this table.

SDA

See the GPIO connectivity guidelines in this table.

INT_OUT

IRQ[15–0]

See the GPIO connectivity guidelines in this table.

NMI

VDDIO

NMI_OUT

RC[21–0]

GND

STOP_BS

GND

TCK

GND

TDI

GND

TDO

TMR[4–0]

See the GPIO connectivity guidelines in this table.

TMS

GND

TRST

See Section 3.1 for guidelines.

URXD

See the GPIO connectivity guidelines in this table.

UTXD

See the GPIO connectivity guidelines in this table.

DDN[1–0]

See the GPIO connectivity guidelines in this table.

DRQ[1–0]

See the GPIO connectivity guidelines in this table.

RCW_LSEL_0

GND

RCW_LSEL_1

GND

RCW_LSEL_2

GND

RCW_LSEL_3

GND

VDDIO

2.5 V

Table 48. Connectivity of TDM Related Pins When TDM Interface Is Not Used

Signal Name

Pin Connection

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