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MSC8152SVT1000B 数据表(PDF) 45 Page - Freescale Semiconductor, Inc |
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MSC8152SVT1000B 数据表(HTML) 45 Page - Freescale Semiconductor, Inc |
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45 / 68 page ![]() Electrical Characteristics MSC8152 Dual-Core Digital Signal Processor Data Sheet, Rev. 1 Freescale Semiconductor 45 2.6.2.4 SGMII AC Timing Specifications Note: Specifications are valid at the recommended operating conditions listed in Table 3. Transmitter and receiver AC characteristics are measured at the transmitter outputs (SR[1–2]_TX[n] and SR[1–2]_TX[n]) or at the receiver inputs (SR[1–2]_RX[n] and SR[1–2]_RX[n]) as depicted in Figure 19, respectively. Table 29 provides the SGMII transmit AC timing specifications. A source synchronous clock is not supported. The AC timing specifications do not include REF_CLK jitter. Table 30 provides the SGMII receiver AC timing specifications. The AC timing specifications do not include REF_CLK jitter. Figure 19. SGMII AC Test/Measurement Load Table 29. SGMII Transmit AC Timing Specifications Parameter Symbol Min Typ Max Unit Notes Deterministic Jitter JD — — 0.17 UI p-p — Total Jitter JT — — 0.35 UI p-p 2 Unit Interval UI 799.92 800 800.08 ps 1 Notes: 1. See Figure 18 for single frequency sinusoidal jitter limits 2. Each UI is 800 ps ± 100 ppm. Table 30. SGMII Receive AC Timing Specifications Parameter Symbol Min Typ Max Unit Notes Deterministic Jitter Tolerance JD 0.37 — — UI p-p 1, 2 Combined Deterministic and Random Jitter Tolerance JDR 0.55 — — UI p-p 1, 2 Total Jitter Tolerance JT 0.65 — — UI p-p 1,2 Bit Error Ratio BER — — 10-12 —— Unit Interval UI 799.92 800.00 800.08 ps 3 Notes: 1. Measured at receiver. 2. Refer to RapidIOTM 1x/4x LP Serial Physical Layer Specification for interpretation of jitter specifications. Also see Figure 18. 3. Each UI is 800 ps ± 100 ppm. TX Silicon + Package D+ Package Pin D– Package Pin C = CTX C = CTX R = 50 Ω R = 50 Ω |
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