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ADP1048ARQZ-R7 数据表(PDF) 47 Page - Analog Devices |
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ADP1048ARQZ-R7 数据表(HTML) 47 Page - Analog Devices |
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47 / 84 page  Data Sheet ADP1047/ADP1048 Rev. 0 | Page 47 of 84 VOUT_SCALE_MONITOR REGISTER This register sets the Kr factor = VOUT/VADC. Table 24. Register 0x2A—VOUT_SCALE_MONITOR Bits Bit Name R/W Description [15:14] RSVD R Reserved. [13:11] Exponent R/W Write the exponent (N) in twos complement format for Kr = Y × 2N. 10 RSVD R Always reads as 0. [9:0] Mantissa R/W Mantissa (Y[9:0]) used in Kr linear mode format (Kr = Y × 2N). VIN_ON REGISTER This register sets the value of the input voltage to start power conversion. Table 25. Register 0x35—VIN_ON Bits Bit Name R/W Description [15:11] Exponent R Return the exponent (N) used in VIN linear mode format (X = Y × 2N). The exponent (N) is set in the exponent register (Register 0xFE39, Bits[5:3]). [10:8] High bits R/W Mantissa high bits (Y[10:8]) used in VIN linear mode format (X = Y × 2N). [7:0] Low byte R/W Mantissa low byte (Y[7:0]) used in VIN linear mode format (X = Y × 2N). The exponent (N) is set in the exponent register (Register 0xFE39, Bits[5:3]). VIN_OFF REGISTER This register sets the value of the input voltage to stop power conversion. Table 26. Register 0x36—VIN_OFF Bits Bit Name R/W Description [15:11] Exponent R Return the exponent (N) used in VIN linear mode format (X = Y × 2N). The exponent (N) is set in the exponent register (Register 0xFE39, Bits[5:3]). [10:8] High bits R/W Mantissa high bits (Y[10:8]) used in VIN linear mode format (X = Y × 2N). [7:0] Low byte R/W Mantissa low byte (Y[7:0]) used in VIN linear mode format (X = Y × 2N). The exponent (N) is set in the exponent register (Register 0xFE39, Bits[5:3]). VOUT_OV_FAULT_LIMIT REGISTER This register sets the accurate overvoltage threshold measured at the PFC output that causes an overvoltage fault condition. Table 27. Register 0x40—VOUT_OV_FAULT_LIMIT Bits Bit Name R/W Description [15:11] Exponent R Return the exponent (N) used in VOUT linear mode format (X = Y × 2N). The exponent (N) is set in the VOUT_MODE register (Register 0x20, Bits[2:0]). The exponent is in twos complement format. [10:8] High bits R/W Mantissa high bits (Y[10:8]) used in VOUT linear mode format (X = Y × 2N). [7:0] Low byte R/W Mantissa low byte (Y[7:0]) used in VOUT linear mode format (X = Y × 2N). VOUT_OV_FAULT_RESPONSE REGISTER This register instructs the device on actions to take due to an output overvoltage fault condition. Table 28. Register 0x41—VOUT_OV_FAULT_RESPONSE Bits Bit Name R/W Description [7:6] Response R/W These bits determine the device response to an output overvoltage fault condition. Bit 7 Bit 6 Response 0 0 Do nothing. 0 1 Continue operation for the time specified by Delay Time 1 (Bits[2:0]). If the fault persists, retry the number of times specified by the retry setting (Bits[5:3]). 1 0 Shut down, disable the output, and retry the number of times specified by the retry setting (Bits[5:3]). 1 1 Disable the output and wait for the fault to clear. After the fault is cleared, reenable the output. |
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