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ADP1048ARQZ-R7 数据表(PDF) 73 Page - Analog Devices

部件名 ADP1048ARQZ-R7
功能描述  Digital Power Factor Correction Controller
PDF  84 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADP1048ARQZ-R7 数据表(HTML) 73 Page - Analog Devices

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Data Sheet
ADP1047/ADP1048
Rev. 0 | Page 73 of 84
EXPONENT REGISTER
This register reads and writes exponents (N) for PIN, VIN, and IIN.
Table 118. Register 0xFE39—Exponent
Bits
Bit Name
R/W
Description
[15:11]
RSVD
R
Reserved.
[10:6]
Input current
exponent
R/W
Sets the exponent for the input current.
[5:3]
Input voltage
exponent
R/W
Sets the exponent for the input voltage.
[2:0]
Input power exponent
R/W
Sets the exponent for the input power.
READ UPDATE RATE REGISTER
Table 119. Register 0xFE3A—Read Update Rate
Bits
Bit Name
R/W
Description
[7:3]
RSVD
R
Reserved.
[2:0]
Averaging window
R/W
These bits set the averaging window for the power current and voltage readings; rms values
from one half ac line cycle are averaged over the programmed number of half ac line cycles.
Bit 2
Bit 1
Bit 0
Number of Half AC Line Cycles
0
0
0
0
0
0
1
16
0
1
0
64
0
1
1
128
1
0
0
512
1
0
1
1024
1
1
0
4096
1
1
1
8192
VIN SCALE MONITOR REGISTER
Table 120. Register 0xFE3B—VIN Scale Monitor
Bits
Bit Name
R/W
Description
[15:14]
RSVD
R
Reserved.
[13:11]
Exponent
R/W
Write the exponent (N) in twos complement format (KVIN = Y × 2N).
10
RSVD
R
Reserved.
[9:0]
Mantissa
R/W
Mantissa (Y[9:0]) used in KVIN linear mode format (KVIN = Y × 2N).
IIN_GSENSE REGISTER
Table 121. Register 0xFE3C—IIN_GSENSE
Bits
Bit Name
R/W
Description
[15:11]
Exponent
R/W
Write the exponent (N) in twos complement format (IIN_GSENSE = Y × 2N).
10
RSVD
R
Reserved.
[9:0]
Mantissa
R/W
Mantissa (Y[9:0]) used in IIN linear mode format (IIN_GSENSE = Y × 2N).



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