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ADP1048ARQZ-R7 数据表(PDF) 74 Page - Analog Devices

部件名 ADP1048ARQZ-R7
功能描述  Digital Power Factor Correction Controller
PDF  84 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADP1048ARQZ-R7 数据表(HTML) 74 Page - Analog Devices

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ADP1047/ADP1048
Data Sheet
Rev. 0 | Page 74 of 84
CS FAST OCP BLANK REGISTER
Table 122. Register 0xFE3D—CS Fast OCP Blank
Bits
Bit Name
R/W
Description
[7:5]
RSVD
R
Reserved.
[4:3]
CS OCP debounce
time
R/W
These bits set the CS OCP debounce time. This value is the minimum time that the CS signal must
be constantly above the ILIM threshold (set in Register 0xFE3E, Bits[7:5]). When the CS OCP debounce
time is exceeded, all PWM outputs are disabled for the remainder of the switching cycle.
Bit 4
Bit 3
Fast OCP Debounce Time
0
0
40 ns
0
1
80 ns
1
0
120 ns
1
1
240 ns
[2:0]
Leading edge
blanking time
R/W
These bits determine the leading edge blanking time. During this time, the OCP comparator
output is ignored.
Bit 2
Bit 1
Bit 0
Leading Edge Blanking Time
0
0
0
40 ns
0
0
1
80 ns
0
1
0
120 ns
0
1
1
160 ns
1
0
0
200 ns
1
0
1
400 ns
1
1
0
600 ns
1
1
1
800 ns
CS FAST OCP SETTING REGISTER
Table 123. Register 0xFE3E—CS Fast OCP Setting
Bits
Bit Name
R/W
Description
[7:5]
ILIM absolute value
R/W
These bits determine the ILIM absolute value. Bit 7 = 0 is positive sensing, and Bit 7 = 1 is
negative sensing.
Bit 7
Bit 6
Bit 5
ILIM Current Value
0
0
0
20 μA
0
0
1
40 μA
0
1
0
60 μA
0
1
1
80 μA
1
0
0
60 μA
1
0
1
80 μA
1
1
0
100 μA
1
1
1
120 μA
[4:2]
RSVD
R
Reserved.
1
CS_RANGE_SELECT
R/W
CS ADC input range.
0 = 750 mV.
1 = 500 mV.
0
SEL_RESVI_REF
R/W
This bit sets the reference current for the CS+ and CS− common-mode level shift.
1 = select the RES VI reference current (changing RRES changes this current).
0 = select the band gap generated reference current.
TEMPERATURE HYSTERESIS REGISTER
Table 124. Register 0xFE3F—Temperature Hysteresis
Bits
Bit Name
R/W
Description
[7:0]
Temperature
hysteresis
R/W
These bits set the temperature (RTD) measurement hysteresis. The OT_FAULT flag is reset when
the RTD ADC value is higher than the temperature fault limit plus hysteresis. The OT_WARN flag
is reset when the RTD ADC value is higher than the temperature warning limit plus hysteresis.



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