WM8904ECSSLASHR datasheet(114/188 Pages) WOLFSON

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WM8904

Pre-Production

PP, Rev 3.3, September 2012

114

EXAMPLE FLL SETTINGS

Table 73 provides example FLL settings for generating common SYSCLK frequencies from a variety

of low and high frequency reference inputs.

FREF

FOUT

FLL_CLK_

REF_DIV

FVCO

FLL_N

FLL_K

FLL_

FRATIO

FLL_

OUTDIV

FLL_

FRACN

_ENA

32.768 kHz

12.288 MHz

Divide by 1

(0h)

98.304

MHz

187

(0BBh)

0.5

(8000h)

(4h)

(7h)

32.768 kHz

11.288576

MHz

Divide by 1

(0h)

90.308608

MHz

344

(158h)

0.5

(8000h)

(3h)

(7h)

32.768 kHz

11.2896

MHz

Divide by 1

(0h)

90.3168

MHz

344

(158h)

0.53125

(8800h)

(3h)

(7h)

48 kHz

12.288 MHz

Divide by 1

(0h)

98.304

MHz

256

(100h)

(0000h)

(3h)

(7h)

12.000 MHz

12.288 MHz

Divide by 1

(0h)

98.3040

MHz

(008h)

0.192

(3127h)

(0h)

(7h)

12.000 MHz

11.289597

MHz

Divide by 1

(0h)

90.3168

MHz

(007h)

0.526398

(86C2h)

(0h)

(7h)

12.288 MHz

Divide by 1

(0h)

98.304

MHz

(008h)

(0000h)

(0h)

(7h)

12.288 MHz

11.2896

MHz

Divide by 1

(0h)

90.3168

MHz

(007h)

0.35

(599Ah)

(0h)

(7h)

13.000 MHz

12.287990

MHz

Divide by 1

(0h)

98.3040

MHz

(007h)

0.56184

(8FD5h)

(0h)

(7h)

13.000 MHz

11.289606

MHz

Divide by 1

(0h)

90.3168

MHz

(006h)

0.94745

(F28Ch)

(0h)

(7h)

19.200 MHz

12.287988

MHz

Divide by 2

(1h)

98.3039

MHz

(005h)

0.119995

(1EB8h)

(0h)

(7h)

19.200 MHz

11.289588

MHz

Divide by 2

(1h)

90.3168

MHz

(004h)

0.703995

(B439h)

(0h)

(7h)

Table 73 Example FLL Settings

WM8904ECS/R 数据表(PDF) 114 Page - Wolfson Microelectronics plc

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