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WM8904ECS/R 数据表(PDF) 159 Page - Wolfson Microelectronics plc |
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WM8904ECS/R 数据表(HTML) 159 Page - Wolfson Microelectronics plc |
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159 / 188 page ![]() Pre-Production WM8904 w PP, Rev 3.3, September 2012 159 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION REFER TO R59 (3Bh) Analogue OUT2 Left 8 LINEOUTL_MU TE 0 Left Line Output Mute 0 = Un-mute 1 = Mute Output Volume Control 7 LINEOUT_VU 0 Line Output Volume Update Writing a 1 to this bit will update LINEOUTL and LINEOUTR volumes simultaneously. Output Volume Control 6 LINEOUTLZC 0 Left Line Output Zero Cross Enable 0 = disabled 1 = enabled Output Volume Control 5:0 LINEOUTL_VO L [5:0] 11_1001 Left Line Output Volume 000000 = -57dB 000001 = -56dB (… 1dB steps) 111001 = 0dB (… 1dB steps) 111110 = +5dB 111111 = +6dB Output Volume Control Register 3Bh Analogue OUT2 Left REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION REFER TO R60 (3Ch) Analogue OUT2 Right 8 LINEOUTR_M UTE 0 Right Line Output Mute 0 = Un-mute 1 = Mute Output Volume Control 7 LINEOUT_VU 0 Line Output Volume Update Writing a 1 to this bit will update LINEOUTL and LINEOUTR volumes simultaneously. Output Volume Control 6 LINEOUTRZC 0 Right Line Output Zero Cross Enable 0 = disabled 1 = enabled Output Volume Control 5:0 LINEOUTR_VO L [5:0] 11_1001 Right Line Output Volume 000000 = -57dB 000001 = -56dB (… 1dB steps) 111001 = 0dB (… 1dB steps) 111110 = +5dB 111111 = +6dB Output Volume Control Register 3Ch Analogue OUT2 Right |
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