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WM8321 数据表(PDF) 135 Page - Wolfson Microelectronics plc |
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WM8321 数据表(HTML) 135 Page - Wolfson Microelectronics plc |
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135 / 253 page  Production Data WM8321 w PD, February 2012, Rev 4.0 135 ADDRESS BIT LABEL DEFAULT DESCRIPTION 9:8 WDOG_SECA CT 10 Secondary action of Watchdog timeout (taken after 2 timeout periods) 00 = No action 01 = Interrupt 10 = Device Reset 11 = WAKE transition Protected by user key 5:4 WDOG_PRIMA CT 01 Primary action of Watchdog timeout 00 = No action 01 = Interrupt 10 = Device Reset 11 = WAKE transition Protected by user key 2:0 WDOG_TO [2:0] 111 Watchdog timeout period 000 = 0.256s 001 = 0.512s 010 = 1.024s 011 = 2.048s 100 = 4.096s 101 = 8.192s 110 = 16.384s 111 = 32.768s Protected by user key Table 79 Controlling the Watchdog Timer The Watchdog timeout interrupt event is indicated by the WDOG_TO_EINT register field. This secondary interrupt triggers a primary Watchdog Interrupt, WDOG_INT (see Section 23). This can be masked by setting the mask bit as described in Table 80. ADDRESS BIT LABEL DESCRIPTION R16401 (4011h) Interrupt Status 1 11 WDOG_TO_EINT Watchdog timeout interrupt. (Rising Edge triggered) Note: Cleared when a ‘1’ is written. R16409 (4019h) Interrupt Status 1 Mask 11 IM_WDOG_TO_EINT Interrupt mask. 0 = Do not mask interrupt. 1 = Mask interrupt. Default value is 1 (masked) Table 80 Watchdog Timer Interrupts |
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