ST7LITE25F2 datasheet(68/166 Pages) STMICROELECTRONICS

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I/O ports

ST7LITE20F2 ST7LITE25F2 ST7LITE29F2

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Doc ID 8349 Rev 5

Figure 32. Interrupt I/O port state transitions

10.4

Unused I/O pins

Unused I/O pins must be connected to fixed voltage levels. Refer to Section 13.8: I/O port

pin characteristics.

10.5

Low power modes

10.6

Interrupts

The external interrupt event generates an interrupt if the corresponding configuration is

selected with DDR and OR registers and if the I bit in the CC register is cleared (RIM

instruction).

10.7

Device-specific I/O port configuration

The I/O port register configurations are summarized as follows:

Standard ports

floating/pull-up

interrupt

INPUT

floating

(reset state)

INPUT

open-drain

OUTPUT

push-pull

OUTPUT

= DDR, OR

Table 24.

Effect of low power modes on I/O ports

Mode

Description

WAIT

No effect on I/O ports. External interrupts cause the device to exit from WAIT mode.

HALT

No effect on I/O ports. External interrupts cause the device to exit from HALT mode.

Table 25.

I/O port interrupt control/wake-up capability

Interrupt event

Event flag

Enable

control bit

Exit from

WAIT

Exit from

HALT

External interrupt on selected

external event

−

DDRx

ORx

Yes

Table 26.

Ports PA7:0, PB6:0

Mode

DDR

Floating input

Pull-up input

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