数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

ST7LITE25F2 数据表(PDF) 99 Page - STMicroelectronics

部件名 ST7LITE25F2
功能描述  8-bit microcontroller with single voltage Flash memory, data EEPROM, ADC, Timers, SPI
PDF  166 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST7LITE25F2 数据表(HTML) 99 Page - STMicroelectronics

Back Button ST7LITE25F2 Datasheet HTML 95Page - STMicroelectronics ST7LITE25F2 Datasheet HTML 96Page - STMicroelectronics ST7LITE25F2 Datasheet HTML 97Page - STMicroelectronics ST7LITE25F2 Datasheet HTML 98Page - STMicroelectronics ST7LITE25F2 Datasheet HTML 99Page - STMicroelectronics ST7LITE25F2 Datasheet HTML 100Page - STMicroelectronics ST7LITE25F2 Datasheet HTML 101Page - STMicroelectronics ST7LITE25F2 Datasheet HTML 102Page - STMicroelectronics ST7LITE25F2 Datasheet HTML 103Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 99 / 166 page
background image
ST7LITE20F2 ST7LITE25F2 ST7LITE29F2
On-chip peripherals
Doc ID 8349 Rev 5
99/166
Figure 48. Single master / multiple slave configuration
11.4.6
Low power modes
Using the SPI to wake up the device from HALT mode
In slave configuration, the SPI is able to wake up the Device from HALT mode through a
SPIF interrupt. The data received is subsequently read from the SPIDR register when the
software is running (interrupt vector fetch). If multiple data transfers have been performed
before software clears the SPIF bit, then the OVR bit is set by hardware.
Note:
When waking up from HALT mode, if the SPI remains in Slave mode, it is recommended to
perform an extra communications cycle to bring the SPI from HALT mode state to normal
state. If the SPI exits from Slave mode, it returns to normal state immediately.
Caution:
The SPI can wake up the Device from HALT mode only if the Slave Select signal (external
SS pin or the SSI bit in the SPICSR register) is low when the Device enters HALT mode. So if
Slave selection is configured as external (see Section : Slave select management), make
sure the master drives a low level on the SS pin when the slave enters HALT mode.
MISO
MOSI
MOSI
MOSI
MOSI
MOSI
MISO
MISO
MISO
MISO
SS
SS
SS
SS
SS
SCK
SCK
SCK
SCK
SCK
5V
Slave
Device
Slave
Device
Slave
Device
Slave
Device
Master
Device
Table 40.
WAIT and HALT mode description
Mode
Description
WAIT
No effect on SPI.
SPI interrupt events cause the device to exit from WAIT mode.
HALT
SPI registers are frozen.
In HALT mode, the SPI is inactive. SPI operation resumes when the Device is
woken up by an interrupt with “exit from HALT mode” capability. The data
received is subsequently read from the SPIDR register when the software is
running (interrupt vector fetching). If several data are received before the
wakeup event, then an overrun error is generated. This error can be detected
after the fetch of the interrupt routine that woke up the Device.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com