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ST7LITE25F2 数据表(PDF) 133 Page - STMicroelectronics |
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ST7LITE25F2 数据表(HTML) 133 Page - STMicroelectronics |
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133 / 166 page  ST7LITE20F2 ST7LITE25F2 ST7LITE29F2 Electrical characteristics Doc ID 8349 Rev 5 133/166 Static and dynamic latch-up ● LU: 3 complementary static tests are required on 10 parts to assess the latch-up performance. A supply overvoltage (applied to each power supply pin) and a current injection (applied to each input, output and configurable I/O pin) are performed on each sample. This test conforms to the EIA/JESD 78 IC latch-up standard. ● DLU: Electro-Static Discharges (one positive then one negative test) are applied to each pin of 3 samples when the micro is running to assess the latch-up performance in dynamic mode. Power supplies are set to the typical values, the oscillator is connected as near as possible to the pins of the micro and the component is put in reset mode. This test conforms to the IEC1000-4-2 and SAEJ1752/3 standards. Note: For more details, refer to the application note AN1181. 13.8 I/O port pin characteristics Table 78. Absolute Maximum Ratings Symbol Ratings Conditions Maximum value(1) 1. Data based on characterization results, not tested in production. Unit VESD(HBM) Electro-static discharge voltage (Human body model) TA=+25°C 4000 V Table 79. Electrical Sensitivities Symbol Parameter Conditions Class(1) 1. Class description: A Class is an STMicroelectronics internal specification. All its limits are higher than the JEDEC specifications, that means when a device belongs to Class A it exceeds the JEDEC standard. B Class strictly covers all the JEDEC criteria (international standard). LU Static latch-up class TA=+25°C A DLU Dynamic latch-up class VDD=5.5V, fOSC=4MHz, TA=+25°C A Table 80. General Characteristics(1) Symbol Parameter Conditions Min Typ Max Unit VIL Input low level voltage − VSS - 0.3 − 0.3 x VDD V VIH Input high level voltage − 0.7 x VDD − VDD + 0.3 Vhys Schmitt trigger voltage hysteresis(2) −− 400 − mV IL Input leakage current VSS≤VIN≤VDD −− ±1 μA IS Static current consumption induced by each floating input pin(3) Floating input mode − 400 − RPU Weak pull-up equivalent resistor(4) VIN= VSS VDD=5V 50 120 250 k Ω VDD=3V − 160 − CIO I/O pin capacitance −− 5 − pF |
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