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Revision 1.0

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AS3953

Datasheet - A pp l ic a t io n I n f or m a t i on

Figure 6. Signal to Controller

8.1.1 Writing of Data to Addressable Registers (Register Write Mode)

Following figures show cases of writing a single byte and writing multiple bytes with auto-incrementing address. After the SPI operation mode

bits, the address of register to be written is provided. Then one or more data bytes are transferred from the SPI, always from the MSB to the LSB.

The data byte is written in register on falling edge of its last clock. In case the communication is terminated by putting /SS high before a packet of

8 bits composing one byte is sent, writing of this register is not performed. In case the register on the defined address does not exist or it is a

read only register no write is performed.

Note:

When the AS3953 is powered via vp_SPI and not via field; the registers and EEPROM can be readout. When CS is set to low, after

50us of the falling edge, the Registers and the EEPROM can be readout. Nevertheless, if there is no activity for 1ms, there is a timeout

and the logic goes to sleep, hence losing the values in the registers. (EEPROM values are retained).

Figure 7. Writing of a Single Register

Figure 8. Writing of Register Data with Auto-incrementing Address

MOSI

MISO

MISO

MOSI

AS3953

MOSI

MISO

I/O

AS3953

µC

µC

Separate SPI Input and Output Signals to Controller

Bi-directional Data IO Signal to Controller

0

0

0

A4

A3

A2

A1

A0

D5

D4

D3

D2

D1

D0

D7

D6

X

X

SCLK rising

edge Data is

transfered from

µC

SCLK falling

edge Data is

sampled

Data is moved to

Address

A4-A0

/SS rising

edge signals

end of WRITE

Mode

Three leading

bits indicate

Mode

/SS

SCLK

MOSI

00 0

A

4

A

3

A

2

A

1

A

0

D

5

D

4

D

3

D

2

D

1

D

0

D

7

D

6

X

X

Data is moved to

Address

<A4-A0> + n

/SS raising edge

signals end of

WRITE Mode

Three leading

bits indicate

Mode

D

5

D

4

D

3

D

2

D

1

D

0

D

7

D

6

D

7

D

6

D

5

D

4

D

3

D

2

D

1

D

0

D

7

D

6

D

1

D

0

Data is moved to

Address

<A4-A0> + (n-1)

Data is moved to

Address

<A4-A0> + 1

Data is moved

to Address

<A4-A0>

/SS

SCLK

MOSI