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Revision 1.0

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AS3953

Datasheet - A pp l ic a t io n I n f or m a t i on

8.1.6 Direct Command Mode

Direct Command Mode has no arguments, so a single byte is sent. SPI operation mode bits 11 indicate Direct Command Mode. The following six

bits define command code, sent MSB to the LSB. The command is executed on falling edge of last clock.

Figure 12. Sending of a Direct Command

8.1.7 SPI Timing

Table 9. Timing Parameters

Symbol

Parameter

Min

Typ

Max

Units

Note

General Timing (VDD = VDD_IO = VDD_D = 3.3V, Temperature 25°C)

SCLK period

200

ns

read the SCLK period has to be increased

to 1µs (this limitation is imposed by

EEPROM read access time)

SCLK low

80

ns

SCLK high

80

ns

SPI reset (/SS high)

50

ns

/SS falling to SCLK rising

25

ns

first SCLK pulse

SCLK falling to /SS rising

80

ns

last SCLK pulse

Data in setup time

10

ns

Data in hold time

10

ns

Data out delay

20

ns

Data out to high impedance delay

20

ns

1

1

C5

C4

C3

C2

C1

C0

X

X

SCLK rising

edge Data is

transfered from

µC

SCLK falling

edge Data is

sampled

/SS rising edge signals

start of command

execution

Two leading

ONE indicate

COMMAND

Mode

/SS

SCLK

MOSI