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MPC5601PEF0MLL4R 数据表(PDF) 73 Page - Freescale Semiconductor, Inc |
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MPC5601PEF0MLL4R 数据表(HTML) 73 Page - Freescale Semiconductor, Inc |
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73 / 95 page ![]() MPC5602P Microcontroller Data Sheet, Rev. 4.1 Freescale Semiconductor 73 Figure 25. Nexus TDI, TMS, TDO timing 3.17.4 External interrupt timing (IRQ pin) Table 38. External interrupt timing1 1 IRQ timing specified at fSYS = 64 MHz and VDD_HV_IOx = 3.0 V to 5.5 V, TA =TL to TH, and CL = 200 pF with SRC = 0b00 No. Symbol C Parameter Conditions Value Unit Min Max 1tIPWL CC D IRQ pulse width low — 4 — tCYC 2tIPWH CC D IRQ pulse width high — 4 — tCYC 3tICYC CC D IRQ edge to edge time2 2 Applies when IRQ pins are configured for rising edge or falling edge events, but not both. —4 + N3 3 N = ISR time to clear the flag —tCYC TDO 6 7 TMS, TDI 8 TCK 9 |
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