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MPC5601PEF0MLL4R 数据表(PDF) 91 Page - Freescale Semiconductor, Inc

部件名 MPC5601PEF0MLL4R
功能描述  MPC5602P Microcontroller Data Sheet
PDF  95 Pages
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制造商  FREESCALE [Freescale Semiconductor, Inc]
网页  http://www.freescale.com
标志 FREESCALE - Freescale Semiconductor, Inc

MPC5601PEF0MLL4R 数据表(HTML) 91 Page - Freescale Semiconductor, Inc

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MPC5602P Microcontroller Data Sheet, Rev. 4.1
Freescale Semiconductor
91
4
11 May 2011 Editorial and formatting changes throughout
Section 1, “Introduction: Reorganized contents
MPC5602P block diagram: reorganized blocks above and below peripheral bridge; made
arrow going from peripheral bridge to crossbar switch bidirectional
Updated Section 1.5, “Feature list:
• changed core feature from “64 MHz” to “Up to 64 MHz”
• memory organization
• moved “16-channel eDMA controller” item to “Interrupts and events” item
• LINFlex: changed “2 LINFlex modules” to “Up to 2 LINFlex modules”
• DSPI: changed “3 DSPI channels“ to “Up to 3 DSPI channels”
• ADC: changed “16 input channels“ to “Up to 16 input channels”
Added Section 1.5, “Feature details
64-pin and 100-pin LQFP pinout diagrams: replaced instances of HV_AD0 with
HV_ADC0
System pins: updated “XTAL” and “EXTAL” rows
Updated LQFP thermal characteristics
Updated EMI testing specifications
Section 3.8.1, “Voltage regulator electrical characteristics: removed BCP56 from named
BJTs; replaced two configuration diagrams and two electrical characteristics tables
with single diagram and single table
Voltage regulator electrical characteristics: updated VDD_LV_REGCOR row
Low voltage monitor electrical characteristics: updated VMLVDDOK_H max value—was
1.15 V; is 1.145 V
Supply current (5.0 V, NVUSRO[PAD3V5V] = 0): changed symbol IDD_LV_CORE to
IDD_LV_CORx; changed parameter classification from T to P for IDD_LV_CORx
RUN—Maximum mode at 64 MHz; added IDD_FLASH characteristics; replaced
instances of “Airbag” mode with “Typical mode”
Supply current (3.3 V, NVUSRO[PAD3V5V] = 1): changed symbol IDD_LV_CORE to
IDD_LV_CORx; replaced instances of “Airbag” mode with “Typical mode”
DC electrical characteristics (3.3 V, NVUSRO[PAD3V5V] = 1): corrected parameter
description for VOL_F—was “Fast, high level output voltage”; is “Fast, low level output
voltage”
Added Section 3.10.4, “Input DC electrical characteristics definition
Main oscillator output electrical characteristics tables: replaced instances of EXTAL with
XTAL; added load capacitance parameter
FMPLL electrical characteristics: updated conditions and table title; removed fsys row;
updated fFMPLLOUT values; replaced instances of VDDPLL with VDD_LV_COR0; replaced
instances of VSSPLL with VSS_LV_COR0
16 MHz RC oscillator electrical characteristics: removed rows
RCMTRIM and RCMSTEP
ADC characteristics and error definitions: updated symbols
ADC conversion characteristics: updated symbols; added row tADC_PU
Added Section 3.15.2, “Flash memory power supply DC characteristics
Added Section 3.15.3, “Start-up/Switch-off timings
Removed section “Generic timing diagrams”
4
(cont’d)
11 May 2011 Updated Start-up reset requirements diagram
Removed FlexCAN timing characteristics
RESET electrical characteristics: added row for tPOR
In the range of figures “DSPI Classic SPI Timing — Master, CPHA = 0” to “DSPI PCS
Strobe (PCSS) Timing”: added note
Table A-1: added “DUT”, “NPN”, and “RISC”
Table 40. Revision history (continued)
Revision
Date
Description of



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