ADS7253IPW datasheet(29/71 Pages) TI1

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ADC_B

AINP_B

AINM_B

REFIO_B

REFGND_B

REFGND_A

REFIO_A

ADC_A

AINP_A

AINM_A

CFR.B6

INTREF

DAC_A

DAC_B

REFDAC_A

REFDAC_B

Enable

10 2F

ADS8353, ADS7853, ADS7253

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SBAS584B – OCTOBER 2013 – REVISED AUGUST 2014

8.3 Feature Description

8.3.1 Reference

The device has two simultaneous sampling ADCs (ADC_A and ADC_B). ADC_A and ADC_B operate with

reference voltages VREF_A and VREF_B present on the REFIO_A and REFIO_B pins, respectively. The REFIO_A

and REFIO_B pins should be decoupled with the REFGND_A and REFGND_B pins, respectively, with 10-µF

decoupling capacitors.

The device supports operation either with an internal or external reference source, as shown in Figure 84. The

reference voltage source is determined by setting bit 6 of the configuration register (CFR.B6). Note that this bit is

common to ADC_A and ADC_B.

Figure 84. Reference Configurations and Connections

When CFR.B6 is 0, the device shuts down the internal reference source (INTREF) and ADC_A and ADC_B

operate on external reference voltages provided by the user on the REFIO_A and REFIO_B pins, respectively.

When CFR.B6 is 1, the device operates with the internal reference source (INTREF) connected to REFIO_A and

REFIO_B via DAC_A and DAC_B, respectively. In this configuration, VREF_A and VREF_B can be changed

independently by writing to the respective user-programmable registers, REFDAC_A and REFDAC_B,

respectively. Refer to the REFDAC Registers (REFDAC_A and REFDAC_B) section for more details.

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Product Folder Links: ADS8353 ADS7853 ADS7253

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