ADS7253IPW datasheet(49/71 Pages) TI1

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SNR

REF

RM S

AM P

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Bandwidth

Gain

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ADS8353, ADS7853, ADS7253

www.ti.com

SBAS584B – OCTOBER 2013 – REVISED AUGUST 2014

9 Application and Implementation

9.1 Application Information

The two primary circuits required to maximize the performance of a high-precision, successive approximation

section details some general principles for designing these circuits, and some application circuits designed using

these devices.

The device supports operation either with an internal or external reference source. Refer to the Reference

section for details about the decoupling requirements.

The reference source to the ADC must provide low-drift and very accurate dc voltage and support the dynamic

charge requirements without affecting the noise and linearity performance of the device. The output broadband

noise (typically in the order of a few 100

μVRMS) of the reference source must be appropriately filtered by using a

low-pass filter with a cutoff frequency of a few hundred hertz. After band-limiting the noise from the reference

source, the next important step is to design a reference buffer that can drive the dynamic load posed by the

reference input of the ADC. At the start of each conversion, the reference buffer must regulate the voltage of the

reference pin within 1 LSB of the intended value. This condition necessitates the use of a large filter capacitor at

the reference pin of the ADC. The amplifier selected to drive the reference input pin must be stable while driving

this large capacitor and should have low output impedance, low offset, and temperature drift specifications. To

reduce the dynamic current requirements and crosstalk between the channels, a separate reference buffer is

recommended for driving the reference input of each ADC channel.

The input driver circuit for a high-precision ADC mainly consists of two parts: a driving amplifier and a fly-wheel

RC filter. The amplifier is used for signal conditioning of the input voltage and its low output impedance provides

a buffer between the signal source and the switched capacitor inputs of the ADC. The RC filter helps attenuate

the sampling charge injection from the switched-capacitor input stage of the ADC and functions as an antialiasing

filter to band-limit the wideband noise contributed by the front-end circuit. Careful design of the front-end circuit is

critical to meet the linearity and noise performance of a high-precision ADC.

9.1.1 Input Amplifier Selection

Selection criteria for the input amplifiers is highly dependent on the input signal type and the performance goals

of the data acquisition system. Some key amplifier specifications to consider while selecting an appropriate

amplifier to drive the inputs of the ADC are:

•

Small-signal bandwidth. Select the small-signal bandwidth of the input amplifiers to be as high as possible

after meeting the power budget of the system. Higher bandwidth reduces the closed-loop output impedance

of the amplifier, thus allowing the amplifier to more easily drive the low cutoff frequency RC filter at the ADC

inputs. Higher bandwidth also minimizes the harmonic distortion at higher input frequencies. In order to

maintain the overall stability of the input driver circuit, the amplifier bandwidth should be selected as

described in Equation 6:

(6)

•

Noise. Noise contribution of the front-end amplifiers should be as low as possible to prevent any degradation

in SNR performance of the system. As a rule of thumb, to ensure that the noise performance of the data

acquisition system is not limited by the front-end circuit, the total noise contribution from the front-end circuit

should be kept below 20% of the input-referred noise of the ADC. Noise from the input driver circuit is band-

limited by designing a low cutoff frequency RC filter and is calculated by Equation 7:

where:

•

V1 / f_AMP_PP is the peak-to-peak flicker noise in µV,

•

en_RMS is the amplifier broadband noise density in nV/√Hz,

•

f–3dB is the 3-dB bandwidth of the RC filter, and

•

NG is the noise gain of the front-end circuit, which is equal to 1 in a buffer configuration.

(7)

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