AD9142ABCPZ datasheet(68/73 Pages) AD

68 / 73 page

Data Sheet

AD9142A

DAC OUTPUT CONTROL REGISTER

Address: 0x44, Reset: 0x8D, Name: DAC_OUTPUT_CTRL

Table 88. Bit Descriptions for DAC_OUTPUT_CTRL

Bits

Bit Name

Settings

Description

Reset

Access

DAC_OUTPUT_CTRL_EN

Enables the DAC output control. This bit needs to be set to 1

to enable the remaining bits in this register.

0x1

FIFO_WARNING_SHUTDOWN_EN

When this bit and Bit 7 are both high, if a FIFO warning occurs,

the DAC output shuts down automatically. By default, this

function is on.

0x1

OVERTHRESHOLD_SHUTDOWN_EN

The DAC output is turned off when the input average power is

greater than the predefined threshold.

0x1

FIFO_ERROR_SHUTDOWN_EN

The DAC output is turned off when the FIFO reports warnings.

0x1

DLL CELL ENABLE 0 REGISTER

Address: 0x5E, Reset: 0xFF, Name: ENABLE_DLL_DELAY_CELL0

Table 89. Bit Descriptions for ENABLE_DLL_DELAY_CELL0

Bits

Bit Name

Description

Reset

Access

[7:0]

DELAY_CELL_ENABLE [7:0]

Set each bit to enable or disable the delay cell. Delay cell number

corresponds to bit number.

0xFF

1 = enable delay cell (default).

0 = disable delay cell.

Different recommended values should be used in DLL mode and

delay line mode. See the Data Interface section.

DLL CELL ENABLE 1 REGISTER

Address: 0x5F, Reset: 0x67, Name: ENABLE_DLL_DELAY_CELL1

Table 90. Bit Descriptions for ENABLE_DLL_DELAY_CELL1

Bits

Bit Name

Description

Reset

Access

[7:3]

Reserved

Must write the default value for optimal performance.

0x0C

[2:0]

DELAY_CELL_ENABLE [10:8]

Set each bit to enable or disable the delay cell. Delay cell numbers

are 10, 9, 8 corresponding to bits Bit, Bit 2, and Bit 0, respectively.

0x7

1 = enable delay cell (default).

0 = disable delay cell.

SED CONTROL REGISTER

Address: 0x60, Reset: 0x00, Name: SED_CTRL

Table 91. Bit Descriptions for SED_CTRL

Bits

Bit Name

Description

Reset

Access

SED_ENABLE

Set to 1 to Enable the SED compare logic.

SED_ERR_CLEAR

When set to 1, clears all SED reported error bits, Bit 2, Bit 1, and Bit

AED_ENABLE

When set to 1, enables the AED function (SED with auto clear after

eight passing sets).

SED_DEPTH

0 = SED depth of two words, 1 = SED depth of four words.

Reserved

Reserved.

AED_PASS

When AED = 1, it signals eight true compare cycles.

AED_FAIL

When AED = 1, it signals a mismatch in comparison.

SED_FAIL

Signals that an SED mismatch in comparison occurred (with SED

or AED enabled).

Rev. A | Page 67 of 72

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