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STV3550 数据表(PDF) 84 Page - STMicroelectronics |
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STV3550 数据表(HTML) 84 Page - STMicroelectronics |
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84 / 144 page  84/144 STV3550 CPU and System Management Functional Description 6.7 Interrupt Management The ST20 core includes an Interrupt Controller (ITC) able to manage up to 16 interrupt levels. On top of this block, the STV3550 has an Interrupt Level Controller (ILC) which connects the 57 interrupt sources. The interrupt sources can be on-chip or off-chip.They can be synchronous or asynchronous (the ILC re-synchronizes the asynchronous sources). Certain interrupt sources can also behave as wake-up sources used to exit Standby mode. Figure 54: Example of Wake-up Interrupt Management Table 21: Interrupt Sources (page 1 of 2) Interrupt Source Name Number of Interrupts Number of Synchronous Interrupts Number of Asynchronous Interrupts Number of Wake-up Interrupts Off-chip Interrupts OSD 4 4 Video Display Pipeline 5 5 SDIN 19 10 9 VTG 5 5 Peripherals and I/Os 20 4 16 7 2 2DBM 2 2 10-bit Wake-up adc clk Clk toward other blocks mode (CPU) AD1 IR Ext IT1 Ext IT2 Ext IT3 Ext IT4 switched off in Standby (OR) 27 MHz Wake-up ITC (from ILC3) Clock Generator RTC Timer Infrared Processor External IT 1 External IT 2 External IT 3 External IT 4 EXTALIN EXTALOUT AD6 Analog-to-Digital Converter |
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