STV3550 datasheet(87/144 Pages) STMICROELECTRONICS

87 / 144 page

TV Chassis Control

STV3550

87/144

7.1.3

Counter Functions

This cell is based on a 32-bit up-counter associated with a 5-bit prescaler that is clocked at 27 MHz

divided by 4. There are:

●

four 32-bit input capture registers linked to four capture inputs,

●

four 32-bit compare registers.

The up-counter can be programmed to start at a specific value. At overflow, this counter is reloaded

with the initial value.

When an external event is detected on the external PWM capture pin, the counter value is copied

into the capture register. This event can be triggered by a rising edge, a falling edge or both. When

this occurs, an interrupt is generated and the capture register value can read and its value reset.

The four 32-bit compare registers can be programmed to trigger an interrupt when the counter value

is equal to one the compare register values. This function is used to create four additional timers.

Interrupts can be generated at any of the following events:

●

at input capture event,

●

at counter overflow,

●

when the compare value matches the counter value.

Note: 1 As only a single interrupt is generated, the interrupt source must be identified by software.

2 The counter can be read anytime, but can only be written to when it is stopped. Compare registers

can be read/written anytime, but capture registers are read only.

STV3550 数据表(PDF) 87 Page - STMicroelectronics