STV3550 datasheet(137/144 Pages) STMICROELECTRONICS

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Timing Specifications

STV3550

137/144

Timing Specifications

The timings are based on the following conditions unless otherwise stated:

1. Input rise and fall times of 3 ns (between 10% and 90%).

2. Output load = 30 pF

3. Output threshold = 1.5 V

10.1

PIO Timings

Reference clock in this case means the last transition of any PIO signal.

10.2

Reset Timings

The tRSTHRSTL value specified in the following table and figure is for power-on reset when the

device is cold. Warm reset parameters (when the clock and power supply are stable) will fall within

these limits and the tRSTHRSTL value should be used for both cases.

Symbol

Parameter

Min

Max

Units

Note

tPCHPOV

PIO_refclock high to PIO output valid

1. These timings do not apply when a PIO pin is an output for the PWM outputs, since these are

generated using a different clock.

tPCHWDZ

PIO tristate after PIO_refclock high

tPIOr

Output Rise Time (CLOAD = 50 pF)

tPIOf

Output Fall Time (CLOAD = 50 pF)

Figure 82: PIO Timings

Symbol

Parameter

Min

Nom

Max

Units

Notes

tRSTHRSTL

notRSTpulse width low

with a stable VDD

Takes temp, voltage and process variations into

account, and provides guardband.

Crystal oscillator start-up times can be long and may

dominate the time from power-up to the end of reset.

PIO Reference Clock

PIOout

tPCHPOV

PIOout

tPCHWDZ

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