RA4M3 datasheet(32/92 Pages) RENESAS

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● Cin = 8 pF, 32 pins, Input frequency = 10 MHz

● Cload = 30 pF, 32 pins, Output frequency = 10 MHz

Leakage current of IO = Σ (VOL × IOL) / Voltage + Σ ((VCC - VOH) × IOH) / Voltage

= (20 mA × 1 V) × 8 / 3.5 V + (1 mA × 0.5 V) × 12 / 3.5 V + ((VCC - (VCC - 0.5 V)) × 1 mA) × 12 / 3.5 V

= 45.7 mA + 1.71 mA + 1.71 mA

= 49.1 mA

Dynamic current of IO = Σ IO (Cin + Cload) × IO switching frequency × Voltage

= ((8 pF × 32) × 10 MHz + (30 pF × 32) × 10 MHz) × 3.5 V

= 42.6 mA

Total power consumption

= Voltage × (Leakage current + Dynamic current)

= (70 mA × 3.5 V) + (49.1 mA + 42.6 mA) × 3.5 V

= 566 mW (0.566 W)

Tj = Ta + θja × Total power consumption

= 100 °C + 33.0 °C/W × 0.566W

= 118.7 °C

2.3

AC Characteristics

2.3.1

Frequency

Table 2.14

Operation frequency value in high-speed mode

Parameter

Symbol

Min

Typ

Max

Unit

Operation frequency

System clock (ICLK)

—

100

MHz

Peripheral module clock (PCLKA)

—

100

Peripheral module clock (PCLKB)

—

Peripheral module clock (PCLKC)

—*2

—

Peripheral module clock (PCLKD)

—

100

Flash interface clock (FCLK)

—*1

—

Note 1. FCLK must run at a frequency of at least 4 MHz when programming or erasing the flash memory.

Note 2. When the ADC12 is used, the PCLKC frequency must be at least 1 MHz.

Table 2.15

Operation frequency value in low-speed mode

Parameter

Symbol

Min

Typ

Max

Unit

Operation frequency

System clock (ICLK)

—

MHz

Peripheral module clock (PCLKA)

—

Peripheral module clock (PCLKB)

—

Peripheral module clock (PCLKC) *2

—*2

—

Peripheral module clock (PCLKD)

—

Flash interface clock (FCLK)*1

—

Note 1. Programming or erasing the flash memory is disabled in low-speed mode.

Note 2. When the ADC12 is used, the PCLKC frequency must be set to at least 1 MHz.

RA4M3 Datasheet

2. Electrical Characteristics

R01DS0368EJ0120 Rev.1.20

Dec 2, 2020

Page 32 of 92

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