VG6640 datasheet(103/126 Pages) STMICROELECTRONICS

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DocID023597 Rev 11

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VG6640, VD6640

Application

125

11.2

PCB layout guidelines

Normal good PCB design practice should be observed for the layout of the image sensor:

•

Power and ground planes should be used to supply power to image sensor.

•

Join both grounds, AGND and DGND into one, single, solid GND plane underneath the

sensor.

•

Connect this GND plane to sensor balls with one via per GND-ball.

•

To limit the number of interruptions of this GND plane fan out the non-GND and non-

supply pads laterally on the top side of the PCB.

•

External decoupling capacitors must be added to all four supply voltages, with values

of:

–

1 x 220nF between VDIG and DGND;

–

1 x 220nF between VANA and DGND,

–

1 x 220nF between VCORE and DGND,

–

1 x 220nF between VRTSF and AGND.

•

The decoupling caps for the supplies must be placed on the bottom side of the PCB, as

close as possible to the supply balls.

•

Connect the supply balls on top with the decoupling caps on bottom taking care to

ensure.

–

The lowest possible impedance.

–

At least one via for every supply ball.

•

To minimize risk of emissions, shield all the Vias and tracks attached to these supplies

by their respective GND nets.

•

The high speed signal pairs (CLOCK+, CLOCK-), (DP_DL1, DN_DL1), and (DP_DL2,

DN_DL2) should be routed as balanced transmission lines with a characteristic

differential impedance (Zodiff) of between 80Ω to 120Ω. The two traces in the signal pair

should be routed together and should be matched in length to within ±1 mm. The

related clock and data pairs should be matched in length to within ±4 mm.

•

The VANA supply is very sensitive to noise and therefore care should be taken when

designing the 2V8 power supply. The noise level on VANA should be kept below

1mVrms. For designs with a very noisy 2V8 supply, a filtering scheme (for example, Π-

type filter and/or linear regulator) should be considered.

•

Quartz crystal - special care should be taken during layout to control the parasitic

capacitances associated with the crystal. Refer to Section 11.4.2: Quartz crystal

•

Maximise copper fill on power planes near the sensor and use vias to improve heat

transfer from the sensor. Consider including heatsinking close to the sensor if it is to be

used at high temperatures.

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