MCP48FVB21 datasheet(5/84 Pages) MICROCHIP

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 2015 Microchip Technology Inc.

DS20005466A-page 5

MCP48FVBXX

1.0

ELECTRICAL CHARACTERISTICS

Absolute Maximum Ratings

(†)

Voltage on VDD with respect to VSS ......................................................................................................... -0.6V to +6.5V

Voltage on all pins with respect to VSS ............................................................................................... -0.6V to VDD+0.3V

Input clamp current, IIK (VI < 0, VI > VDD, VI > VPP on HV pins) ..........................................................................±20 mA

Output clamp current, IOK (VO < 0 or VO > VDD)...................................................................................................±20 mA

Maximum current out of VSS pin

(Single) ..........................................................................................................50 mA

(Dual)...........................................................................................................100 mA

Maximum current into VDD pin

(Single) ..........................................................................................................50 mA

(Dual)...........................................................................................................100 mA

Maximum current sourced by the VOUT pin ............................................................................................................20 mA

Maximum current sunk by the VOUT pin..................................................................................................................20 mA

Maximum current sunk by the VREF pin.................................................................................................................125 µA

Maximum input current source/sunk by SDI, SCK, and CS pins .............................................................................2 mA

Maximum output current sunk by SDO Output pin .................................................................................................25 mA

Total power dissipation (1) ....................................................................................................................................400 mW

Package power dissipation (TA = +50°C, TJ = +150°C)

MSOP-10 ..................................................................................................................................................490 mW

ESD protection on all pins

±4 kV (HBM)

±400V (MM)

 ±1.5 kV (CDM)

Latch-Up (per JEDEC JESD78A) @ +125°C .....................................................................................................±100 mA

Storage temperature ...............................................................................................................................-65°C to +150°C

Ambient temperature with power applied ...............................................................................................-55°C to +125°C

Soldering temperature of leads (10 seconds) ....................................................................................................... +300°C

Maximum Junction Temperature (TJ).................................................................................................................... +150°C

Note 1:

Power dissipation is calculated as follows:

PDIS = VDD x {IDD -  IOH} +  {(VDD –VOH) x IOH} + (VOL x IOL)

† Notice:

Stresses above those listed under “Maximum Ratings” may cause permanent damage to the device. This is

a stress rating only and functional operation of the device at those or any other conditions above those indicated in the

operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods

may affect device reliability.

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