MCP48FVB21 datasheet(76/84 Pages) MICROCHIP

76 / 84 page

MCP48FVBXX

DS20005466A-page 76

 2015 Microchip Technology Inc.

APPENDIX B:

TERMINOLOGY

B.1

Resolution

Resolution is the number of DAC output states that

divide the full-scale range. For the 12-bit DAC, the

resolution is 212, meaning the DAC code ranges from

0 to 4095.

B.2

Least Significant Bit (LSb)

This is the voltage difference between two successive

codes. For a given output voltage range, it is divided by

the resolution of the device (Equation B-1). The range

may be VDD (or VREF) to VSS (ideal), the DAC register

codes across the linear range of the output driver

(Measured 1), or full-scale to zero-scale (Measured 2).

EQUATION B-1:

LSb VOLTAGE

CALCULATION

B.3

Monotonic Operation

Monotonic operation means that the device’s output

voltage (VOUT) increases with every 1 code step (LSb)

increment (from VSS to the DAC’s reference voltage

(VDD or VREF)).

FIGURE B-1:

VW (VOUT).

Note:

When there are 2N resistors in the resistor

ladder and 2N tap points, the full-scale

DAC register code is the resistor element

(1 LSb) from the source reference voltage

(VDD or VREF).

VLSb(Measured) =

VOUT(@4000) - VOUT(@100)

(4000 - 100)

Ideal

VLSb(IDEAL) =

VDD

VREF

Measured 1

VLSb =

VOUT(@FS) - VOUT(@ZS)

2N - 1

Measured 2

2N = 4096 (MCP48FXB2X)

= 1024 (MCP48FXB1X)

256 (MCP48FXB0X)

40h

3Fh

3Eh

03h

02h

01h

00h

Voltage (VW ~= VOUT)

VW (@ tap)

VS0

VS1

VS3

VS63

VS64

VW =

VSn + VZS(@ Tap 0)

n = 0

n = ?

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