DSPIC33EP64GS708 datasheet(33/484 Pages) MICROCHIP

33 / 484 page

 2016-2018 Microchip Technology Inc.

DS70005258C-page 33

dsPIC33EPXXXGS70X/80X FAMILY

4.0

MEMORY ORGANIZATION

The dsPIC33EPXXXGS70X/80X family architecture

features separate program and data memory spaces,

and buses. This architecture also allows the direct

access of program memory from the Data Space (DS)

during code execution.

4.1

Program Address Space

The program address memory space of the

dsPIC33EPXXXGS70X/80X family devices is 4M

instructions. The space is addressable by a 24-bit

value derived either from the 23-bit PC during program

execution, or from table operation or Data Space

remapping, as described in Section 4.9 “Interfacing

Program and Data Memory Spaces”.

User application access to the program memory space

is restricted to the lower half of the address range

(0x000000 to 0x7FFFFF). The exception is the use of

TBLRD operations, which use TBLPAG<7> to permit

access to calibration data and Device ID sections of the

configuration memory space.

The program memory maps for dsPIC33EPXXXGS70X/

80X devices not operating in Dual Partition mode are

shown in Figure 4-1 and Figure 4-2.

The dsPIC33EPXXXGS70X/80X devices can operate

in a Dual Partition Flash Program Memory mode,

where the user Program Flash Memory is arranged as

two separate address spaces, one for each of the

Flash partitions. The Active Partition always starts at

address, 0x000000, and contains half of the available

Flash memory (64k/128k, depends on device). The

Inactive Partition always starts at address, 0x400000,

and implements the remaining half of Flash memory.

As shown in Figure 4-3 and Figure 4-4, the Active and

Inactive Partitions are identical, and both contain

unique copies of the Reset vector, Interrupt Vector

Tables (IVT and AIVT if enabled) and the Flash

Configuration Words.

Note:

This data sheet summarizes the features

of the dsPIC33EPXXXGS70X/80X family

of devices. It is not intended to be a

comprehensive reference source. To com-

plement the information in this data sheet,

refer to “dsPIC33E/PIC24E Program

Memory” (DS70000613) in the “dsPIC33/

PIC24 Family Reference Manual”, which is

available from the Microchip website

(www.microchip.com).

DSPIC33EP64GS708 数据表(PDF) 33 Page - Microchip Technology

DSPIC33EP64GS708 数据表(HTML) 33 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载