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DSPIC33EP64GS708 数据表(PDF) 53 Page - Microchip Technology |
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DSPIC33EP64GS708 数据表(HTML) 53 Page - Microchip Technology |
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53 / 484 page ![]() 2016-2018 Microchip Technology Inc. DS70005258C-page 53 dsPIC33EPXXXGS70X/80X FAMILY When a PSV page overflow or underflow occurs, EA<15> is cleared as a result of the register indirect EA calculation. An overflow or underflow of the EA in the PSV pages can occur at the page boundaries when: • The initial address, prior to modification, addresses the PSV page • The EA calculation uses Pre- or Post-Modified Register Indirect Addressing; however, this does not include Register Offset Addressing In general, when an overflow is detected, the DSRPAG register is incremented and the EA<15> bit is set to keep the base address within the PSV window. When an underflow is detected, the DSRPAG register is decre- mented and the EA<15> bit is set to keep the base address within the PSV window. This creates a linear PSV address space, but only when using Register Indirect Addressing modes. Exceptions to the operation described above arise when entering and exiting the boundaries of Page 0 and PSV spaces. Table 4-16 lists the effects of overflow and underflow scenarios at different boundaries. In the following cases, when overflow or underflow occurs, the EA<15> bit is set and the DSRPAG is not modified; therefore, the EA will wrap to the beginning of the current page: • Register Indirect with Register Offset Addressing • Modulo Addressing • Bit-Reversed Addressing TABLE 4-16: OVERFLOW AND UNDERFLOW SCENARIOS AT PAGE 0 AND PSV SPACE BOUNDARIES(2,3,4) O/U, R/W Operation Before After DSxPAG DS EA<15> Page Description DSxPAG DS EA<15> Page Description O, Read [++Wn] or [Wn++] DSRPAG = 0x2FF 1 PSV: Last lsw page DSRPAG = 0x300 1 PSV: First MSB page O, Read DSRPAG = 0x3FF 1 PSV: Last MSB page DSRPAG = 0x3FF 0 See Note 1 U, Read [--Wn] or [Wn--] DSRPAG = 0x001 1 PSV page DSRPAG = 0x001 0 See Note 1 U, Read DSRPAG = 0x200 1 PSV: First lsw page DSRPAG = 0x200 0 See Note 1 U, Read DSRPAG = 0x300 1 PSV: First MSB page DSRPAG = 0x2FF 1 PSV: Last lsw page Legend: O = Overflow, U = Underflow, R = Read, W = Write Note 1: The Register Indirect Addressing now addresses a location in the base Data Space (0x0000-0x7FFF). 2: An EDS access, with DSRPAG = 0x000, will generate an address error trap. 3: Only reads from PS are supported using DSRPAG. 4: Pseudolinear Addressing is not supported for large offsets. |
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