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DSPIC33EP64GS708 数据表(PDF) 65 Page - Microchip Technology |
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DSPIC33EP64GS708 数据表(HTML) 65 Page - Microchip Technology |
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65 / 484 page ![]() 2016-2018 Microchip Technology Inc. DS70005258C-page 65 dsPIC33EPXXXGS70X/80X FAMILY 5.4 Dual Partition Flash Configuration For dsPIC33EPXXXGS70X/80X devices operating in Dual Partition Flash Program Memory modes, the Inactive Partition can be erased and programmed with- out stalling the processor. The same programming algorithms are used for programming and erasing the Flash in the Inactive Partition, as described in Section 5.2 “RTSP Operation”. On top of the page erase option, the entire Flash memory of the Inactive Partition can be erased by configuring the NVMOP<3:0> bits in the NVMCON register. 5.4.1 FLASH PARTITION SWAPPING The Boot Sequence Number is used for determining the Active Partition at start-up and is encoded within the FBTSEQ Configuration register bits. Unlike most Configuration registers, which only utilize the lower 16 bits of the program memory, FBTSEQ is a 24-bit Configuration Word. The Boot Sequence Number (BSEQ) is a 12-bit value and is stored in FBTSEQ twice. The true value is stored in bits, FBTSEQ<11:0>, and its complement is stored in bits, FBTSEQ<23:12>. At device Reset, the sequence numbers are read and the partition with the lowest sequence number becomes the Active Partition. If one of the Boot Sequence Numbers is invalid, the device will select the partition with the valid Boot Sequence Number, or default to Partition 1 if both sequence numbers are invalid. See Section 27.0 “Special Features” for more information. The BOOTSWP instruction provides an alternative means of swapping the Active and Inactive Partitions (soft swap) without the need for a device Reset. The BOOTSWP must always be followed by a GOTO instruc- tion. The BOOTSWP instruction swaps the Active and Inactive Partitions, and the PC vectors to the location specified by the GOTO instruction in the newly Active Partition. It is important to note that interrupts should temporarily be disabled while performing the soft swap sequence and that after the partition swap, all peripherals and interrupts which were enabled remain enabled. Addi- tionally, the RAM and stack will maintain state after the switch. As a result, it is recommended that applications using soft swaps jump to a routine that will reinitialize the device in order to ensure the firmware runs as expected. The Configuration registers will have no effect during a soft swap. For robustness of operation, in order to execute the BOOTSWP instruction, it is necessary to execute the NVM unlocking sequence as follows: 1. Write 0x55 to NVMKEY. 2. Write 0xAA to NVMKEY. 3. Execute the BOOTSWP instruction. If the unlocking sequence is not performed, the BOOTSWP instruction will be executed as a forced NOP and a GOTO instruction, following the BOOTSWP instruc- tion, will be executed, causing the PC to jump to that location in the current operating partition. The SFTSWP and P2ACTIV bits in the NVMCON register are used to determine a successful swap of the Active and Inactive Partitions, as well as which partition is active. After the BOOTSWP and GOTO instructions, the SFTSWP bit should be polled to verify the partition swap has occurred and then cleared for the next panel swap event. 5.4.2 DUAL PARTITION MODES While operating in Dual Partition mode, the dsPIC33EPXXXGS70X/80X family devices have the option for both partitions to have their own defined security segments, as shown in Figure 27-4. Alterna- tively, the device can operate in Protected Dual Partition mode, where Partition 1 becomes permanently erase/ write-protected. Protected Dual Partition mode allows for a “Factory Default” mode, which provides a fail-safe backup image to be stored in Partition 1. dsPIC33EPXXXGS70X/80X family devices can also operate in Privileged Dual Partition mode, where addi- tional security protections are implemented to allow for protection of intellectual property when multiple parties have software within the device. In Privileged Dual Par- tition mode, both partitions place additional restrictions on the FBSLIM register. These prevent changes to the size of the Boot Segment and General Segment, ensuring that neither segment will be altered. 5.5 Flash Memory Resources Many useful resources are provided on the main product page of the Microchip website for the devices listed in this data sheet. This product page contains the latest updates and additional information. 5.5.1 KEY RESOURCES • “Dual Partition Flash Program Memory” (DS70005156) in the “dsPIC33/PIC24 Family Reference Manual” • Code Samples • Application Notes • Software Libraries • Webinars • All Related “dsPIC33/PIC24 Family Reference Manual” Sections • Development Tools Note 1: The application software to be loaded into the Inactive Partition will have the address of the Active Partition. The bootloader firmware will need to offset the address by 0x400000 in order to write to the Inactive Partition. |
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