DSPIC33EP64GS708 datasheet(140/484 Pages) MICROCHIP

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dsPIC33EPXXXGS70X/80X FAMILY

DS70005258C-page 140

 2016-2018 Microchip Technology Inc.

11.6.5

OUTPUT MAPPING

In contrast to inputs, the outputs of the Peripheral Pin

Select options are mapped on the basis of the pin. In

this case, a control register associated with a particular

pin dictates the peripheral output to be mapped. The

RPORx registers are used to control output mapping.

Each register contains sets of 6-bit fields, with each set

associated with one RPn pin (see Register 11-33

through Register 11-56). The value of the bit field cor-

responds to one of the peripherals and that peripheral’s

output is mapped to the pin (see Table 11-13 and

Figure 11-3).

A null output is associated with the output register

Reset value of ‘0’. This is done to ensure that remap-

pable outputs remain disconnected from all output pins

by default.

FIGURE 11-3: MULTIPLEXING REMAPPABLE

OUTPUTS FOR RPn

11.6.5.1

Mapping Limitations

The control schema of the peripheral select pins is not

limited to a small range of fixed peripheral configura-

tions. There are no mutual or hardware-enforced

lockouts between any of the peripheral mapping SFRs.

Literally any combination of peripheral mappings,

across any or all of the RPn pins, is possible. This

includes both many-to-one and one-to-many mappings

of peripheral inputs, and outputs to pins. While such

mappings may be technically possible from a configu-

ration point of view, they may not be supportable from

an electrical point of view.

RPnR<6:0>

Default

U1TX Output

SDO2 Output

CLC4OUT Output

CLC3OUT Output

Output Data

RPn

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